Amek AT8 Hybrid Line Driver Questions

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Is there a technical reason for your wide traces or is it personal preference?

Both - more copper left on the board = less copper needs to be etched away; there's more contact surface between copper & laminate, so less risk in case of rework (if / when needed); the lower the resistance, the better, most of the time; and why WOULD you want or need to go for "bare minimum", when you're not compelled to?

The pitch of the OPA1679 is 1,27mm (50mil) so if I go for 0,635mm (25mil) traces I would have very little separation between signal traces and pads.

Exactly - PITCH, not pad width. 0.6mm is about the width of the pads themselves, is it not? So what's wrong with that? And especially with such a simple circuit / board, are you reeeeeeeeally constrained to need to run ANY traces between any of the opamp's pads? Really?

Split that quad opamp into two duals, if the routing really is THAT complicated :D There are ways...
 
What about crosstalk?
Both - more copper left on the board = less copper needs to be etched away; there's more contact surface between copper & laminate, so less risk in case of rework (if / when needed); the lower the resistance, the better, most of the time; and why WOULD you want or need to go for "bare minimum", when you're not compelled to?



Exactly - PITCH, not pad width. 0.6mm is about the width of the pads themselves, is it not? So what's wrong with that? And especially with such a simple circuit / board, are you reeeeeeeeally constrained to need to run ANY traces between any of the opamp's pads? Really?

Split that quad opamp into two duals, if the routing really is THAT complicated :D There are ways...
Since this board will be the first prototype anyway I'm sticking to 10mil and see how it performs. Minimum trace width for jlc is 5mil, so it should be fine.
 
What about crosstalk?
Between what and what?

Since this board will be the first prototype anyway I'm sticking to 10mil and see how it performs. Minimum trace width for jlc is 5mil, so it should be fine.
and why WOULD you want or need to go for "bare minimum", when you're not compelled to?
Fine, "you do you", but then...
Since this is the first time I'm doing any PCB layout I'd be happy if someone might have some feedback on it :)

"I'm new at this; give me feedback so i can dismiss it"..? 🤷‍♂️
 
Between what and what?



Fine, "you do you", but then...


"I'm new at this; give me feedback so i can dismiss it"..? 🤷‍♂️
I appreciate the feedback but if there's no apparent problem in my layout that would be solved by 25mil traces, then I don't see a need to redraw it just for good measure.
 
Since this is the first time I'm doing any PCB layout I'd be happy if someone might have some feedback on it
if there's no apparent problem in my layout that would be solved by 25mil traces
more copper left on the board = less copper needs to be etched away; there's more contact surface between copper & laminate, so less risk in case of rework (if / when needed); the lower the resistance, the better, most of the time;

So, which is it? Is this your first time and are looking to learn more and improve your skills and thinking/judgment about this? Or are you suddenly an expert and have technical reasons to dismiss (i'm hoping pertinent) advice you've been given?

I'm not saying the board won't work as is, or that my tips would make "all the difference", but... Once again, why settle for bare minimum? 🤨

Does the CAD package you're using, not allow you to select all traces, select a new trace width, and apply it to all selected traces? If that's the case, sure, that would be a bit on the tedious side, i'll admit, but... 🤷‍♂️

Yep, components are all on the board and the resistors & ceramic capacitors are all 1206.
  • Why is the board that huge (considering the original was maybe ~10-15% of the apparent area)?
  • Why are components spread out so far and wide?
  • Power traces should reach C7/C10 before the power pins of the opamp
    (see particularly Fig.3 here: https://e2e.ti.com/blogs_/archives/...e-decoupling-capacitor-is-it-really-necessary, as well as page 9 here: https://www.emcstandards.co.uk/files/part_5a_decoupling.pdf )
  • Ground connection of opamp pin 12 would've had plenty of room under the chip
  • Speaking of which, since J3 is through-hole anyway, what's that trace from pin 2 shooting off to the right, ending up in a via (to the groundplane)? Same with pin 1 of J1, pin 2 of RV1, "top" terminal of R18 and R6?
  • How and why is the trace coming off the right-side terminal of R5, looping aaaaaaaaaaaaaall around the board (under R2, R3, tapping off R7, under R16, tapping off C6, under R6, under C2, in between the pins of J3, and finally ending at R13)??? It wouldn't have been the end of the world to just run a short trace from R5 to R13 on the bottom layer...
  • A slightly shorter, but still relatively massive loop from the left-side terminal of R3, tapping off R16, wandering all the way down to C2, going under C5, and then to R15
  • Then again, that kinda makes splitting that quad opamp into two duals sound almost desirable, if / since the quad makes routing so difficult....
Are all the components on the board already? If not, place them all there first. If yes, you might wanna hold off on the trace routing until the component placement is (arguably) as good as you can get it (shortest feasible connections etc).

... But that's just me 🤷‍♂️ Looking forward to hear what anyone else has to say though - i might just be talking out of my rear end...
 
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Thanks for the detailed info! Learning more and improving my skills and thinking/judgment is exactly why I've been so "stubborn" about the trace width :p But let's leave the trace width aside for now.

- the board is so huge because I started with the default size for jlcpcb orders, which is 100x100mm. The original AT8 was indeed a lot smaller, but the circuit also relies on external components from the main channel pcb (mainly the electrolytic caps & trimpot). I will either reduce the final board in size or I might also add the balanced input stage.
- I'm still getting a feel for the size and when looking at the wireframe in kicad everything looks pretty close to me until i switch to the 3d view :D So yeah, I will definitely work on getting stuff closer together
- that's an interesting point about the decoupling caps! I was always aware that it should be as close to the pins as possible but that's the first time I hear about the powerline having to pass through it first. Thanks for the links, I'll definitely take a look at it!
- you are absolutely correct xD
- also correct, that placement was unnecessarily complicated
- about the loops etc.: the underside is one big ground plane, which is why I haven't run traces there:

1715081258049.png

I could run the +/- traces on the bottom layer instead, which would give me much more flexibility for routing the top and reduce many of the large loops?

- I'm sticking to the quad because I want to use as few components as I can ;)
 
- about the loops etc.: the underside is one big ground plane, which is why I haven't run traces there:

I remember that, but running that one example trace on the bottom would not have ruined anything. There's not even any significant current involved, so while a solid ground plane is of course a good idea / intention, at least in my book it stops being that good an idea if it overly complicates everything else :D

If there was a signal that HAD to get from one corner of the board to the opposite one, of course I wouldn't want to split the ground plane that drastically, but a little 2-5mm "slot" is no big deal in the analog world. It would be a different story in a class-D amp or a switching converter (high frequencies AND beefy currents), but that's really not the case here :)

PS. If you wanna shrink the board to the max (or rather, to the minimum :D ) and you have physical room "behind" where the board gets mounted (in case it ends up with pins along the edge as the original ceramic ones), you could even "overlap" SMD's and through-hole parts, and mount the latter from the other side. Just a thought :p

Any reason the bottom ground plane doesn't cover the entire board, though? And/or any reason why those electrolytics & connectors are (still) seemingly randomly scattered in that bottom area?
 
I wasn't involved in any of the actiivities with the different AT8 versions; Possibly different manufacturer at one point but as a comment, now having a larger die and using only a dual for the two sections that actually feed the output might be better for heat dissipation.
 
I remember that, but running that one example trace on the bottom would not have ruined anything. There's not even any significant current involved, so while a solid ground plane is of course a good idea / intention, at least in my book it stops being that good an idea if it overly complicates everything else :D

If there was a signal that HAD to get from one corner of the board to the opposite one, of course I wouldn't want to split the ground plane that drastically, but a little 2-5mm "slot" is no big deal in the analog world. It would be a different story in a class-D amp or a switching converter (high frequencies AND beefy currents), but that's really not the case here :)

PS. If you wanna shrink the board to the max (or rather, to the minimum :D ) and you have physical room "behind" where the board gets mounted (in case it ends up with pins along the edge as the original ceramic ones), you could even "overlap" SMD's and through-hole parts, and mount the latter from the other side. Just a thought :p

Any reason the bottom ground plane doesn't cover the entire board, though? And/or any reason why those electrolytics & connectors are (still) seemingly randomly scattered in that bottom area?
For some reason I've been reluctant to "disturb" the mystical groundplane, which is why I moved all the tht parts to the outside of the board xD But in hindsight that made the routing on top much weirder than it needed to be. Is it better to have a single large cutout in the ground plane for tht & power traces, or should I create separate individual cutouts?
 
Is it better to have a single large cutout in the ground plane for tht & power traces, or should I create separate individual cutouts?

Can't you set any "isolation" parameter for the bottom layer copper pour? I should imagine Kicad is able to automatically "make room" for whatever gaps need to be there. We're a few decades past needing to manually worry about that (taped pcb layouts etc)...

https://www.wayneandlayne.com/blog/2013/02/26/kicad-tutorial-copper-pours-fills/
 
I wasn't involved in any of the actiivities with the different AT8 versions; Possibly different manufacturer at one point but as a comment, now having a larger die and using only a dual for the two sections that actually feed the output might be better for heat dissipation.
Do you know if Rupert Neve was involved with the AT8? The longer I read the Mozart Manual, the less clear it becomes which parts were actually designed/modified by the man himself. There's several comments from Rupert Neve about the TLA input/output stages but at the same time only the MicPre, EQ & Buss Driver are officially attributed to him.
 
The Mozart was 'in production' before Rupert was taken on as a 'consultant' (I think) and he worked on the mic amp and EQ sections of the MZ15 module which includes a ceramic AT8 for insert send and bus out functions, The previous MZ10,11,12 had the more usual cross coupled outputs (if I remember correctly ) and not an AT8. The revised stereo mix card used AT8 so probably only Graham Langley can give a definitive answer, From the MZ5 AMEK with Rupert went on to the 9098 desk which used the AT8. I went to Tokyo with Rupert to demonstrate a special small demo 9098 which was enlightening. The Japenese had modified a digital recorder (CD?) to record flat to over 50kHz certainly rare. The premise for the event was that capturing audio to a wider bandwidth increases brain engagement (interest) in the music, With MRI scans showing increased brain activity. The 9098 naturally provided a platform to handle audio up to around 100kHz.
The EQ was specified by Rupert although is in itself nothing particularly radical as other designers produce excellent EQs too. My 'theory' is that the choice of frequency bands and 'Q ' is more 'musician '(desk operator) friendly as it is easier to grab the control you really need quickly which makes work quicker and more satisfying. I was amused to see people that copy the original 'Rupert' mic stage repeating a mistake that Rupert made on the Mozart incarnation.
 
Can't you set any "isolation" parameter for the bottom layer copper pour? I should imagine Kicad is able to automatically "make room" for whatever gaps need to be there. We're a few decades past needing to manually worry about that (taped pcb layouts etc)...

https://www.wayneandlayne.com/blog/2013/02/26/kicad-tutorial-copper-pours-fills/
KiCad is much smarter than I expected oO I just extended the ground plane to the whole board and as far as I can tell KiCad automatically connects the relevant THT pads to the ground plane while keeping the other pads separate!

1715104678480.png
 
I remember that, but running that one example trace on the bottom would not have ruined anything. There's not even any significant current involved, so while a solid ground plane is of course a good idea / intention, at least in my book it stops being that good an idea if it overly complicates everything else :D

If there was a signal that HAD to get from one corner of the board to the opposite one, of course I wouldn't want to split the ground plane that drastically, but a little 2-5mm "slot" is no big deal in the analog world. It would be a different story in a class-D amp or a switching converter (high frequencies AND beefy currents), but that's really not the case here :)

PS. If you wanna shrink the board to the max (or rather, to the minimum :D ) and you have physical room "behind" where the board gets mounted (in case it ends up with pins along the edge as the original ceramic ones), you could even "overlap" SMD's and through-hole parts, and mount the latter from the other side. Just a thought :p

Any reason the bottom ground plane doesn't cover the entire board, though? And/or any reason why those electrolytics & connectors are (still) seemingly randomly scattered in that bottom area?
I'm still working on it but right now it's already compact enough to fit 4x circuits on a 100x100 PCB :)
1715109796716.png
 
Now that looks a LOT better :D If you wanted to make it really pretty, you could make sure all the SMD's are oriented the same way (just a couple left to rotate to achieve that). Could even rotate the three signal electrolytics to match the two power-filtering ones' orientation (could minimize possible assembly errors).
 
The capacitor orientation is a good idea! I once did a recap of a small old Behringer mixer and was really impressed that all the electrolytics were oriented the same way.
 

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KiCad is much smarter than I expected oO I just extended the ground plane to the whole board and as far as I can tell KiCad automatically connects the relevant THT pads to the ground plane while keeping the other pads separate!

View attachment 128476
In board setup window you can adjust clearance between traces and also solder Mask... Check Jlcpcb capabilities for this... Also keep Gnd plane 1.27mm from board Edge... I usually set clearance double the track width

Best
 
The capacitor orientation is a good idea! I once did a recap of a small old Behringer mixer and was really impressed that all the electrolytics were oriented the same way.

You can also rotate R2, R9, C3, R10 & C4 too ;) Maybe also bring R3 in line with R5...

PS: Power traces still seem to go to the opamp pins, before the bypass capacitors, though 😬
 
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You can also rotate R2, R9, C3, R10 & C4 too ;) Maybe also bring R3 in line with R5...

PS: Power traces still seem to go to the opamp pins, before the bypass capacitors, though 😬
I rotated the components and while it's aesthetically more pleasing I have to move some of them further away from the IC pins than before. This is where it gets philosophical. I'll sleep over it but in the end I will probably prioritize function over form.

I still haven't had time to do more reading about the power pins. The idea that current will pass in a straight line and will go into every component sequentially sounds very "romantic" to me. Even more so when we're talking about fractions of millimeters and when the current could physically choose an alternate path. Let's imagine a scenario where the power trace passes through the pad of the capacitor first, but the physical distance between the IC power pin and the beginning of the capacitive element are equal. Would current still run through the capacitor first just because we want it to? This thought experiment might get even weirder the more the package sizes between capacitor & IC differ. What if the IC is QFP but the ceramic capacitor is a through hole part? In that case the physical path "into" the capacitor might actually be longer/of more resistance, than the direct path into the IC.
 
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