Portable two-band Parametric EQ (ESP/Urei 545)

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Here is the schematic of the 2-band (full range) parametric EQ I've been working on, with the collaboration of everyone in this thread.
Your schemo is hardly legible. Can you post one with better resolution?
I'm not sure if decoupling caps should be added between the opamps below (U30, U25, U45).
Whjat do you mean? Power rail decoupling caps or output DC blocking caps?
It is still not clear to me if all grounds marked as VGND are correct, since I think it was mentioned in this thread that at least the ones after the 100u caps should go to normal GND (-6V).
The 100uF caps are necessary when connecting to GROUND. They are not necessary when connecting to VGND. However it has been deemed better to return this path to GROUND rather than VGND, so ideally, the 100uF caps should be used and returned to GROUND, not VGND.
 
Here goes a high-res copy of the current schematic. Apparently the forum restricts images to 1200px 96dpi, so I post it externally by now.

My question on decoupling refers to opamp input/output DC blocking. Mostly concerned about the added mixer pot (R198, bottom left in the diagram) possibly picking up DC from U25 or U45 (bottom right)–therefore scratching. A cap might be needed between R179 and the non-inverting input of U45, or between R179 and the output of U25? Or both?

Regarding GND, could you reference me to discussions or explain me please why GND has been deemed better than VGND for this circuit? I see the Urei is grounded, but some other applications are not. Does this mean that no rail splitter is needed at all? Kinda shocking for me since I've been working on the rail-splitter design quite a lot, but things as they are.
Just wondering if grounding it to GND wouldn't introduce more noise.
Also, more crucially, my interpretation is that using GND will reduce the headroom of the current circuit with the opamps it was intended for (AD712/TL042, +4V min. CMV). Using GND the midpoint 0dB would badly sit at 4.5V @ 9V, while using VGND I can push the midpoint to 5.5V @ 9V, therefore maintaining 3VPP at minimum battery charge (from 4V to 7V).

The purpose of the EQ is to feed an ADC (PCM1802), which is just happy with 3VPP. I'm aware that rail-to-rail opamps are better for battery use, but I couldn't get some (ie. here recommended) TLV9102/OPA1652 yet and it feels somehow good to have a more versatile circuit as a base–knowing the consequences.
2-band+PEQ_600dpi.png
 
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My question on decoupling refers to opamp input/output DC blocking. Mostly concerned about the added mixer pot (R198, bottom left in the diagram) possibly picking up DC from U25 or U45 (bottom right)–therefore scratching. A cap might be needed between R179 and the non-inverting input of U45, or between R179 and the output of U25? Or both?
Not necessary because all circuits are biased at VGND.
Regarding GND, could you reference me to discussions or explain me please why GND has been deemed better than VGND for this circuit?
Because AC return currents related to potentiometers are motre easily dumped by real ground than the virtual one.
Does this mean that no rail splitter is needed at all? Kinda shocking for me since I've been working on the rail-splitter design quite a lot, but things as they are.
Rail-splitter is a must for biasing all circuits adequately.
Also, more crucially, my interpretation is that using GND will reduce the headroom of the current circuit with the opamps it was intended for (AD712/TL042, +4V min. CMV). Using GND the midpoint 0dB would badly sit at 4.5V @ 9V, while using VGND I can push the midpoint to 5.5V @ 9V, therefore maintaining 3VPP at minimum battery charge (from 4V to 7V).
Actually I had not noticed that the rail splitter is not balanced. The two resistors should be equal, so the possible voltage swing is always symmetrical vs. VGND. AC voltages go up and down.
The purpose of the EQ is to feed an ADC (PCM1802), which is just happy with 3VPP. I'm aware that rail-to-rail opamps are better for battery use,
Beware that some are restricted to 5.5V max.
 
Rail-splitter is a must for biasing all circuits adequately.
What would be the function of the rail-splitter if all connections are grounded to GND? I mean, where would I connect the midpoint split if no VGND is used?

Actually I had not noticed that the rail splitter is not balanced. The two resistors should be equal, so the possible voltage swing is always symmetrical vs. VGND. AC voltages go up and down.

I thought that the asymmetry would only affect the available headroom, which I wanted to be asymmetric because the opamp's -CMV is higher than its +CMV. Not sure if that idea is clear. Do the asymmetry of the rail splitter also affect the symmetry of the actual "audio signal" as well, resulting in deformation (stretch unevenly) the positive/negative poles of the input wave?
 
What would be the function of the rail-splitter if all connections are grounded to GND? I mean, where would I connect the midpoint split if no VGND is used?
Open your eyes. Many connections to VGND.
I thought that the asymmetry would only affect the available headroom, which I wanted to be asymmetric because the opamp's -CMV is higher than its +CMV.
Look at a sinewave; it goes as much above than below. So teh rest position must be centered.
Not sure if that idea is clear. Do the asymmetry of the rail splitter also affect the symmetry of the actual "audio signal" as well, resulting in deformation (stretch unevenly) the positive/negative poles of the input wave?
No, it doesn't, unless the waveform is permanently assymmetrical, which is not a serious proposition. Something that always go more up than down (or the contrary) will end up flying to the ceiling (+V) or fall on the ground.
 

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Many connections to VGND.
Do you mean that only the frequency pots that go through the 100u caps should be grounded, but all the rest marked VGND should stay v-grounded?

No, it doesn't

Still don't get the problem here with an asymmetric rail-splitter. If power source is 9V and the midpoint is set to 5.5V; then, for a 3Vpp output, AC current within the opamps would swing between 4V-7V, which lies within the CMV limits of the opamp. Why would the opamp care about it? No intention to offend anyone if I'm being too ignorant here, but it is a crucial question for me because getting new opamps would cost me relevant cash and few months of wait.
 
Do you mean that only the frequency pots that go through the 100u caps should be grounded, but all the rest marked VGND should stay v-grounded?
When establishing a virtual earth node it needs to be low impedance to mimic ground. Capacitor coupled components that don't need to be biased at a DC voltage can be connected directly to the real ground making things easier for the virtual earth buffer.
Still don't get the problem here with an asymmetric rail-splitter. If power source is 9V and the midpoint is set to 5.5V; then, for a 3Vpp output, AC current within the opamps would swing between 4V-7V, which lies within the CMV limits of the opamp. Why would the opamp care about it? No intention to offend anyone if I'm being too ignorant here, but it is a crucial question for me because getting new opamps would cost me relevant cash and few months of wait.
It is good practice to establish virtual earth at v/2 to insure maximum clean voltage swing. Op amps do not always clip symmetrically. Further SVF (state variable filters) can exhibit higher than unity gain in certain individual bandpasses. Clipping one of those bandpasses can cause unusual distortions.

JR
 
Do you mean that only the frequency pots that go through the 100u caps should be grounded, but all the rest marked VGND should stay v-grounded?
Yes.
Still don't get the problem here with an asymmetric rail-splitter. If power source is 9V and the midpoint is set to 5.5V; then, for a 3Vpp output, AC current within the opamps would swing between 4V-7V, which lies within the CMV limits of the opamp. Why would the opamp care about it?
It doesn't "care". It's just that the output will be capable of swinging 2.5V from 5.5 to 8V (up) and 3.7V from 5.5 to +1.3, so clearly the positive peaks will not pass. By putting the VGND at mid-voltage, the positive peaks will pass (just). *
All that provided the opamp doesn't run out of steam.
I would really suggest you increase the supply voltage. Three Li batteries should put you somewhere about 11V.

*Actually, the output capability of the AD712 is not symmetrical, so the VGND should be about 0.15V above half voltage. But this is on paper. Proper experimentation is the rule here.
 
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the output will be capable of swinging 2.5V from 5.5 to 8V (up) and 3.7V from 5.5 to +1.3,

The common mode voltage spec. of the AD712 writes: -Vs + 4 (min) and +Vs - 2 (max). That means to me that, for a 9V supply, the voltage swing goes from 4V (min) to 7V (max) –so 5.5V in the middle. Where are you taking the -Vs + 1.3 and +Vs -4V figure from? Or am I reading these numbers the other way around?

I see @abbey road d enfer that you added an input cap to the circuit thanks. Can C39 (between mixer pot and first gain pot) be safely eliminated?
 
At the moment I cannot go over 3 li-Ion batteries for case-size reasons. Actually I have 4 li-Ion in the case, but one of them is exclusive to a MCU and digital VDD of the ADC the VSF is connected to. If I would find an effective and minimal way to separate analog and digital circuits I could indeed have 4s voltage available...
 
The common mode voltage spec. of the AD712 writes: -Vs + 4 (min) and +Vs - 2 (max). That means to me that, for a 9V supply, the voltage swing goes from 4V (min) to 7V (max) –so 5.5V in the middle. Where are you taking the -Vs + 1.3 and +Vs -4V figure from? Or am I reading these numbers the other way around?
Input common mode range has almost nothing to do with output swing capability. With VGND at 4.5V, it will be within specs regarding input voltage range.
I see that you added an input cap to the circuit thanks. Can C39 (between mixer pot and first gain pot) be safely eliminated?
You could but I wouldn't.
Regarding this pot, I understand it's a dry/wet mix. It feeds the EQ with a variable impedance, which will skew the Boost/Cut taper. You may not like it in the end.
There is a better way to do this. Note that with the attached drawing, polarity will be reversed, because each parametric section inverts polarity and tthe output mixer also.
Tou may want to use a non-inverting mixer there.
At the moment I cannot go over 3 li-Ion batteries for case-size reasons. Actually I have 4 li-Ion in the case, but one of them is exclusive to a MCU and digital VDD of the ADC the VSF is connected to. If I would find an effective and minimal way to separate analog and digital circuits I could indeed have 4s voltage available...
Three should be OK for good performance up till 80% discharge (20% remaining).
 

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Input common mode range has almost nothing to do with output swing capability.
I see! I was confusing the input/output voltage figures all the time. I couldn't find the output swing spec in the datasheet, but I trust your numbers. Rail splitter back to symmetry.

Indeed the mixer is a dry/wet. I appreciate very much your reformulation in the diagram, it saves me a resistor :)

Note that with the attached drawing, polarity will be reversed

A bigger picture of my application goes below. At the output an ADC with a series 4.7u input film cap. At the input a sum mixer. There are three preamps before the EQ: Left, Right and Center. But the center is merged into both channels via the input mixer. Both input sum mixer and output dry/wet mixer are inverting, so at the end phase is straight again. Each mixer includes a cap in the feedback loop to form a sort of 2nd order 48kHz antialiasing filter for the ADC (sampling at 96kHz).

I'm particularly not sure if the sum mixer for the preamps is well designed. Output impedance of the preamps is 510ohm and each ends in a 100u series elco.

2-band+PEQ_full.png
 
Without digging too deeply into the SVF sections I see some familiar topology.

From a quick glance is the AD712 stable driving a large C to ground? The data sheet examples include a build out resistance like 100 ohms between op amp and capacitive load. I am not recommending 100 ohms just asking is it stable that way?

The frequency pot configuration looks a little challenging. 100 ohm resistors feeding the virtual earth integrator from the pot wiper will effectively slug the frequency pots causing errors. Not to mention that tolerance of such pot's bulk resistance is typically 20%, meaning the end limit divider will not track well from channel to channel. This will behave a Q/bandwidth error. An alternate approach is to short across the end limit resistors R159, R128, so pot wiper is grounded at LF end of pot rotation but add a high value R from top of the pot to the op amp - inputs for LF audio path. This can improve the LF tracking dramatically even using 5% resistors. You will want to cap couple that pot section so the added LF resistor does not allow the DC gain shifting by the low R to ground. Having the DC gain change a bunch can cause audible pot/wiper noise.

Caveat I just made these observations from a distance, I will assume the larger circuit works.

JR
 
Thanks a lot John for your contribution.

From a quick glance is the AD712 stable driving a large C to ground?

I suppose you are referring to the load capacitors of the rail splitter on top. Actually I haven't try it this way, I've only breadboarded the filter with a "naked" opamp splitter and a single 100nF at the - input (as suggested by Abbey in page 1), which worked great IMO. But it was recommended to me to add those output load caps and I'll add a small series resistor because you are right, as drawn it is completely out of specs.

but add a high value R from top of the pot to the op amp - inputs for LF audio path.

I've done my best to interpret your suggestion which seems a fundamental change, but we are at very different levels of understanding a VSF, so it's hard for me to follow.
What means that the frequency pot "slugs" and what kind of frequency errors does it produce?
The large tolerance of the frequency pots also worries me. I managed to find some 9mm 4-channel pots (for stereo) that are supposedly 10%, but any improvement in that area is crucial. However, I couldn't illustrate well your proposed solution. Replacing R159 and R128 by a wire seems clear, but adding a high value R from top of the pot (at HF end I suppose) to which - inputs? And which value of R? The coupling cap should go between the pot and the added resistor?
 
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Thanks a lot John for your contribution.



I suppose you are referring to the load capacitors of the rail splitter on top. Actually I haven't try it this way, I've only breadboarded the filter with a "naked" opamp splitter and a single 100nF at the - input (as suggested by Abbey in page 1), which worked great IMO. But it was recommended to me to add those output load caps and I'll add a small series resistor because you are right, as drawn it is completely out of specs.
do what works
I've done my best to interpret your suggestion which seems a fundamental change, but we are at very different levels of understanding a VSF, so it's hard for me to follow.
I don't recognize "VSF"
What means that the frequency pot "slugs" and what kind of frequency errors does it produce?
Sorry for blinding you with jargon, "slugging" refers to a low impedance wiper load, pulling or distorting the pot's intended taper.
The large tolerance of the frequency pots also worries me.
It shouldn't, it related to how they are manufactured.
I managed to find some 9mm 4-channel pots (for stereo) that are supposedly 10%, but any improvement in that area is crucial.
no... that would be a waste of money
However, I couldn't illustrate well your proposed solution. Replacing R159 and R128 by a wire seems clear, but adding a high value R from top of the pot (at HF end I suppose) to which - inputs? And which value of R? The coupling cap should go between the pot and the added resistor?
sorry I was too lazy to provide a complete design, and I still am. When the wiper is grounded... there is no current from it feeding into the op amp integrator (that's the - input I was referring to). Adding an additional resistor from the top of the pot, into the opamp - input provides signal current at LF when the pot is turned completely off.

Feel free to disregard my suggestions.
====
At least revisit using that 100 ohm resistor between the wiper and op amp - input. In my judgement that value is WAY too low.

JR
 
I don't think it's laziness @JohnRoberts it must be a huge task to calculate and design a properly functioning PEQ to my flavour and I don't expect nobody would have the motivation to do it for me/from scratch. But the hints are highly regarded. I'll breadboard it, experiment calmly and report here my results in any case. That 100R on the target.

Thanks a lot you both for the help.
 
Check this. It gives a 1:20 range with a smooth enough taper. Don't expect to get more range.
Thank you Abbey... that is what I was trying to describe.

Now the tolerance of the pot is less important. The HF and LF extremes are now set by 5% or better resistors, not the 20% pot. Of course the pot taper still matters, but the way pots are manufactured the tapers will be more accurate than bulk resistance.

JR
 
I've been playing with this today, just sharing some preliminary impressions and barely any conclusions.

Grounding the fPots to GND instead of VGND was an immediate improvement, response became agile (I understand pot slug now) and the contours of the filter much more clear.

I increased the integrator resistors to 1K and the caps reduced to 10n. I couldn't notice much of a difference in terms of 'sluggishness', other than the range was reduced in the low frequencies. With the previous 100R 100n configuration the range went further lower, although oscillating in certain Q/Gain extreme pot positions–which I guess I can live with...

Don't expect to get more range.

Didn't dig much yet into John's idea, since my main concern at the moment is Fq range. I know I'm pushing the limits here, but I need to be able to shape frequencies that are close to each other at any possible range within the audible spectrum, with both filter stages simultaneously. The 100R 100n setting was the closest I got to it so far, before lows start oscillating. Is John's mod anyhow contributing to my purpose (apart from its golden purpose of bypassing the pots tolerance)? I'm back to the breadboard :)
 
Hi @abbey road d enfer , sorry for insisting on this but what is the reason the SVF oscillates when forced to cover a full range spectrum (ie. 40Hz-15KHz). I thought it would be due to particular opamp limitations they 'run out of juice', but I tried with other opamps with very high output specs and bandwidth and same happens. Could you please share with me what the limiting factor is?
 

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