8 channel AD converter idea/discussion

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[quote author="playboss"]http://www.analog.com/en/prod/0,2877,AD9511,00.html[/quote]
Why?

The AD9511 is a nice part, but suggesting its application in DIY audio is a bit far-fetched. First, the jitter mentioned in the data sheet is measured by integrating the phase noise over 12kHz-20MHz, which is commonly used for (optical) communications links. For audio one would be interested in jitter from phase noise between ~10Hz-10kHz, which may well be more than the 12kHz-20MHz due to 1/f (and 1/f^2) noise. Second, I find it hard to believe that a regular buffer/driver with proper supply decoupling has more jitter than this part. Finally, who in DIY-land is going to solder a 48-LFCSP package?

[Now, the AD9511 does have a rather low noise divider. This might be useful if you had a low noise XO at a multiple of your ADC/DAC MCLK. This is quite uncommon, as higher frequency XOs have more phase noise (->jitter) than an XO at MCLK would have. Jitter on BCK/LRCK is moot, as it is easily removed with either a latch or a DFF clocked @ MCLK]

[quote author="playboss"]http://www.diyaudio.com/forums/showthread.php?s=&threadid=54023[/quote]
Ah yes, the thread where one forum member attributes over an order of magnitude higher jitter to plain gates than the rest of the world has found.

[quote author="TobWen"]Without using AD9511, is this design okay? It's asynchron, I think. :oops:[/quote]
Broken image link, can't tell much from it.

JDB.
 
Fixed:
8wwg2p.jpg
 
That's not a synchronous clock divider. Sure, the 'HC193 is synchronous, but for the entire divider chain to be synchronous everything needs to be clocked from a common signal. Have a look at the 'HC163; it's designed for such operation, or use the 'HC590 which is an all-in-one 8-bit sync divider. Then again, an asynchronous divider may not add a noticeable amount of jitter compared to the other possible noise coupling mechanisms.

I would suggest reclocking the output of the AL1401 through a 74xx374 or similar.

What voltage does everything run at? Are you sure that HC-logic is fast enough at that voltage?

Why is there one single resistor between your clock block and the 'HC193+ADC?

JDB.
 
[quote author="jdbakker"]That's not a synchronous clock divider. Sure, the 'HC193 is synchronous, but for the entire divider chain to be synchronous everything needs to be clocked from a common signal. Have a look at the 'HC163; it's designed for such operation, or use the 'HC590 which is an all-in-one 8-bit sync divider. Then again, an asynchronous divider may not add a noticeable amount of jitter compared to the other possible noise coupling mechanisms.[/quote]

Okay ... having a look again :)

[quote author="jdbakker"]I would suggest reclocking the output of the AL1401 through a 74xx374 or similar.[/quote]

Reclocking the OPTI-out?

[quote author="jdbakker"]What voltage does everything run at? Are you sure that HC-logic is fast enough at that voltage?[/quote]

You're right. AC is the way to go. LVC is too hard to find.

[quote author="jdbakker"]Why is there one single resistor between your clock block and the 'HC193+ADC?[/quote]

Tent recommendes it.
 
[quote author="TobWen"][quote author="jdbakker"]I would suggest reclocking the output of the AL1401 through a 74xx374 or similar.[/quote]
Reclocking the OPTI-out?[/quote]
Sorry, I was thinking DAC. Nothing needs to be reclocked here.

[quote author="TobWen"][quote author="jdbakker"]What voltage does everything run at? Are you sure that HC-logic is fast enough at that voltage?[/quote]
You're right. AC is the way to go. LVC is too hard to find.[/quote]
You may want to read one or two pages back to see what I said earlier about AC logic.

Why LVC? It's much faster than you need.

BTW, pretty much any logic family can be bought from http://www.digikey.com/.

[quote author="TobWen"][quote author="jdbakker"]Why is there one single resistor between your clock block and the 'HC193+ADC?[/quote]
Tent recommendes it.[/quote]
I am sure he recommends having a resistor between the clock and devices that are clocked by it; I doubt he suggests this particular configuration. I don't want to sound preachy, but when making a design it's best to know why such components are in rather than treating them like magic. The role of this resistor is explained in the book by Dr. Johnson that I mentioned earlier.

JDB.
 
You said AC is pretty noisy ... okay. Then I'll go for AHC.
I can't use HC, since it's pretty slow on 3.3V.
LVC would be nice and less noisy on 3.3V.

This is, what it looks like with 74AHC590:
vsm4p3.gif


What resistor do you suggest it to be?
You're experienced and I appriciate your help!
 
[quote author="TobWen"]LVC is specified for 3.3V, so performance should be best on this chip.[/quote]
Why do you think those two are related? There are over a dozen logic families which are specified to work at 3V3, why pick LVC?

JDB.
 
[quote author="TobWen"]Because logic-ICs get slower, if you lower Vcc.
A 74HC590 @ 2V is slow as hell and cannot handle 11 MHz.
@ 3.3V it can handle 11 MHz, but it's critical.[/quote]
I also said that the faster the logic family (more precisely: the faster the rise/fall times), the more noise it will generate. You want logic that is just fast enough (within the full operating rate, naturally), but no faster. I have not seen any evidence that LVC hits that spot.

[quote author="TobWen"]You told me to do some reading :)[/quote]
And I'm eagerly waiting for you to start doing so.

JDB.
 
114dB??? a mere childrens toy :)

hehehhee..

but more seriously - I've no doubt it's a good product. Surely, the whole point of DIY is to try and do a little better than what you can buy at guitar center?

Good luck - I'm watching this thread with interest...

<if it's not TI, it's crap> Roche :wink:
 
[quote author="TobWen"]NICE - This one just came through the ticker:
http://www.cirrus.com/en/products/pro/detail/P1089.html[/quote]
Yes, you could do a lot worse than the CS5368, as we discussed three pages ago.
[quote author="Rochey"]114dB??? a mere childrens toy :)
[...]
<if it's not TI, it's crap> Roche :wink:[/quote]
So when's TI going to come up with a 8-channel ADC/DAC that is worth a damn ? ;-)

JDB.
[seriously, should you have such a chip I'll design it in]
 
I bet, as soon, as I have the first prototype, everyone will be complaining about 44.1 kHz ...

I'm working on 44.1 kHz and in my opinion, it's enough :)
96 kHz is nice, but data is getting pretty big.
192 kHz is very nice, but only a few ADAT-cards can handle it.

For the first DIY ADAT-converter, 44.1 kHz should be 'nuff!
 
[quote author="jdbakker"]I also said that the faster the logic family (more precisely: the faster the rise/fall times), the more noise it will generate. You want logic that is just fast enough (within the full operating rate, naturally), but no faster. I have not seen any evidence that LVC hits that spot.[/quote]

I've read this again:
Aren't good fast rise/fall times important for clocking-signals?

A friend of mine also added:
When choosing full synchronisation, it might happen that meta-stability appears between SCKL and LRCK. The flank-direction of SCKL is important.
 

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