8 channel AD converter idea/discussion

[mikeyB]

I been looking for conversion to ADAT both ways preferably att 96k as well on s-mux. Been a long time since i cadded pcb but getting back into it - goin to tackle a 2 channel 1u calrec eq for those interested - then who knows - this/these projects look like it could be something "for the season to be jolly" :!: :grin:

 

[Rochey]

there aren't enough hours in a day at the moment. :sad:

I've got a design that'll support 48Khz at 118dB on the back of a napkin.

The next step is putting it all into Eagle.

*sigh*

BTW - quick question - If I did get PCB's made, would you prefer the surface mount products already soldered, or would you prefer to do it yourselves?

cheers

R

 

[jdbakker]

[quote author="Rochey"]BTW - quick question - If I did get PCB's made, would you prefer the surface mount products already soldered, or would you prefer to do it yourselves?[/quote]
...and keep in mind that the chips Rochey is talking about likely have a pin pitch of 0.635mm or less. I know that industrious people have Ways To Deal with such parts, but I've killed one too many $50 chips this way. Oh well, maybe I'm all thumbs...

To be honest, Rochey, this is the main stumbling block I have with the PGA2500 (that and the fact that I can't find a small-qty-friendly distributor who has them in stock). As a matter of fact, it's one of the reasons I'm going with the SOIC-24 CS5381 ADC rather than waiting for the PCM4222.

JDB
[working on a board for the PGA2500. All that's left to work out is whether to have the LPF relay-switched on the same PCB as the '2500, or move it off-board and just use a regular switch]

 

[Rochey]

Thanksgiving weekend is in sight... a few hours to dedicate to this project.

 

[walter]

Well I finally did a search for the ADA8000 and got about a dozen threads, there's alot of good info, so I'll be buissy reading. I don't want to use a skillet for smt, so I would prefer pre mounted. Also Thru-hole would be good for all power supply components, I have repaired a few BOSE car stereos by reflowing the power supply resistors, they heat up and break the solder joint.

 

[mhelin]

I just found out that Farnell now stocks the CS5361 (~10 EUR +VAT) and CS5381 (~24 EUR + VAT) ADC's. Now we need just a proper PCB layout for the 4 ADC's and the Wavefront chips to make the ADA8000 killer...

 

[Rochey]

hold on till april, there'll be some new toys in town

 

[Michael Krusch]

Is Wavefront the only company that makes ADAT receivers and transmitters?

 

[walter]

I think Alesis makes ADAT components as well.

 

[jdbakker]

[quote author="walter"]I think Alesis makes ADAT components as well.[/quote]
Wavefront used to be Alesis Semiconductor (see this story). They are the licenseholder for ADAT; as far as I know noone else has been licensed to produce and sell ADAT Lightpipe chips.

JDB.
[then again, see this page for a description of the signal]

 

[Rochey]

at this point, yes.

you can license the FPGA code from Alesis as well.

The DiceII chip from TC Technologies and the Bridgco 1394 chip also has oneboard ADAT. (The DiceII is supposedly a very good solution - it's PLL's are excellent).

I've heard of some customers using a TI TMS320C5402 DSP to do the formatting into ADAT form.

 

[Michael Krusch]

A special dsp will make it more complicated.
Is the protocol of the communication between the transmitter/receiver and the converter some kind of standardised, so I can use any converter? Or do I have to compare every datasheet?
I know that both must have the same digital voltage level.

 

[jdbakker]

[quote author="Michael Krusch"]Is the protocol of the communication between the transmitter/receiver and the converter some kind of standardised, so I can use any converter?[/quote]
It's mostly standardized. There's left-justified and I2S, which most modern converters support, and right-justified, which is more rare. The AL1401A OptoGen ADAT transmiter appears to support both left- and right-justified data.

[quote author="Michael Krusch"]Or do I have to compare every datasheet?[/quote]
That's always a good idea in any case.

The AL1401A is a bit unusual, it internally generates the bit clock from an externally applied word clock. The disadvantage is that it only supports a 64Fs BCLK, so if you want to use a converter like the TI PCM4202 which wants a BCLK of 128Fs in single-rate mode (which is all that you can use over ADAT without S/MUX), you'll need a CPLD between the ADC and transmitter to re-shuffle the bitstream. Other converters, like the Cirrus CS5362/5382 or the older TI PCM1804, directly support a 64Fs BCLK.

There may be other gotchas, so it would be most prudent to spell out the relevant datasheets, particularly the timing diagrams.

JDB.

 

[mhelin]

[quote author="jdbakker"]
The AL1401A is a bit unusual, it internally generates the bit clock from an externally applied word clock. The disadvantage is that it only supports a 64Fs BCLK, so if you want to use a converter like the TI PCM4202 which wants a BCLK of 128Fs in single-rate mode (which is all that you can use over ADAT without S/MUX), you'll need a CPLD between the ADC and transmitter to re-shuffle the bitstream. Other converters, like the Cirrus CS5362/5382 or the older TI PCM1804, directly support a 64Fs BCLK.
[/quote]

Now what kind of clocking scheme you have to use / is the best or the simpliest one with the 4 x Cirrus A/D's and the AL1401AG ("green" part no)? The LRCK for the A/D's has to be synchronized so you need a 12.288MHz nominal master clock and a divider circuit to generate the 64fs bitclock (and invert it for the A/D btw.) and the wordclock (48 kHz).

CS5381 Data Sheet says:
3.2.2 Slave Mode

LRCK and SCLK operate as inputs in Slave mode. It is recommended that the left/right clock be synchronously derived from the master clock and must be equal to Fs. It is also recommended that the serial clock be synchronously derived from the master clock and be equal to 64x Fs to maximize system performance.

The AL1401AG just needs the serial data outputs and the 48 kHz wordclock . It would also be useful to buffer the WDCK to a BNC output. How about if you want to use an external WDCK? You'll need a PLL then, or could use the AL1402 (OptoRec) as a PLL, or S/PDIF receiver (CS8412 or never part), right? Regarding the jitter which is then better as a PLL the S/PDIF receiver or the OptoRec?

 

[Rochey]

[quote author="jdbakker"]

The AL1401A is a bit unusual, it internally generates the bit clock from an externally applied word clock. The disadvantage is that it only supports a 64Fs BCLK, so if you want to use a converter like the TI PCM4202 which wants a BCLK of 128Fs in single-rate mode (which is all that you can use over ADAT without S/MUX), you'll need a CPLD between the ADC and transmitter to re-shuffle the bitstream. Other converters, like the Cirrus CS5362/5382 or the older TI PCM1804, directly support a 64Fs BCLK.
[/quote]

Damn, I handn't noticed that before...

that adds some complexity

 

[jdbakker]

[quote author="mhelin"]Now what kind of clocking scheme you have to use / is the best or the simpliest one with the 4 x Cirrus A/D's and the AL1401AG ("green" part no)?[/quote]
For maximum simplicity all you need is a nice, stable crystal oscillator. Feed one of the CS5381s this clock and set it to master mode, no external dividers needed. Set all other '5381s to slave mode, and you're all set.

[quote author="mhelin"]How about if you want to use an external WDCK? You'll need a PLL then, or could use the AL1402 (OptoRec) as a PLL, or S/PDIF receiver (CS8412 or never part), right? Regarding the jitter which is then better as a PLL the S/PDIF receiver or the OptoRec?[/quote]
That's where it starts getting hairy. You have three options:

- use the OptoRec, with horrible jitter performance (~1.5ns)
- if you can use AES/EBU sync instead of WC, use a CS841x or an SRC4392 (~100ps jitter)
- if you feel like spending a lot of time, design your own PLL, preferably with a VCXO. Depending on your RF-fu and your PLL-fu, jitter will be between ~100ps and ~10ps.

We've discussed jitter and locking recently in the Word Clock generator and Portable HDD recorder threads.

[quote author="Rochey"][quote author="jdbakker"]The disadvantage is that [the AL1401A] only supports a 64Fs BCLK, so if you want to use a converter like the TI PCM4202 which wants a BCLK of 128Fs in single-rate mode (which is all that you can use over ADAT without S/MUX), you'll need a CPLD between the ADC and transmitter to re-shuffle the bitstream.[/quote]
Damn, I handn't noticed that before...[/quote]
It might work. TI doesn't actually say that a 64Fs BCLK is verboten:

[quote author="The PCM4202 data sheet, page 9"]
The BCK rate is typically equal to 128fS in Single Rate sampling mode, and 64fS in Dual or Quad Rate sampling modes. Although other BCK clock rates are possible, they are not recommended as a result if potential clock phase sensitivity issues, which can degrade the dynamic performance of the PCM4202.[/quote]
It doesn't quite say that it won't work, but (in my reading) it rather recommends against it. If only we knew someone within TI audio to clear up this ambiguity...

JDB.
[and for Plan B, you could just put a SRC between the PCM4202 and the AL1401A. IIRC, the SRC419x does support 64Fs out. Overkill for a commercial product, but a lot less headaches for DIY]

 

[Rochey]

The modulator oversampling rate for Single Rate operation is 128fs. The modulator frequency response has limited rejection at one-half this rate, which is 64fs.

Careful board layout and reference decoupling should take care of this, but it can happen. That's why we run the BCK at 128fs in Master mode for Single Rate sampling.


Is suggest that something like a FIFO could be used.

 

[mhelin]

[quote author="jdbakker"]
For maximum simplicity all you need is a nice, stable crystal oscillator. Feed one of the CS5381s this clock and set it to master mode, no external dividers needed. Set all other '5381s to slave mode, and you're all set.
[/quote]
Thanks, that looks fine. How about using an external superclock instead of the crystal oscillator? That (superclock) hasn't been discussed a lot here (regarding jitter etc.).

I also found that Crystal has an 8-ch A/D, the CS5368, with reasonable specs (114 dB dynamic range, see http://www.cirrus.com/en/products/pro/detail/P1089.html ). That chip needs just the crystal (for the on-board oscillator driver), and it's also got the differential inputs ( http://www.cirrus.com/en/pubs/proDatasheet/CS5368_F1.pdf ). Obviously the analog inputs need the differential buffers (two opams / channel). Downside is the 48-pin LQFP (0.5 mm pin pitch) package.

 

[jdbakker]

[quote author="mhelin"][quote author="jdbakker"]
For maximum simplicity all you need is a nice, stable crystal oscillator. Feed one of the CS5381s this clock and set it to master mode, no external dividers needed. Set all other '5381s to slave mode, and you're all set.
[/quote]
Thanks, that looks fine. How about using an external superclock instead of the crystal oscillator? That (superclock) hasn't been discussed a lot here (regarding jitter etc.).[/quote]
A superclock needs to go through drivers, cable and a receiver, all of which introduce jitter (albeit the cable not so much for a periodical signal as it would for AES/EBU sync). All other things being equal a superclock would have less jitter than wordclock, and a local XO will be better still. Even so, if you have to sync multiple units a (properly implemented) superclock would be best; for lowest jitter this would still involve a PLL and a VCXO.

[quote author="mhelin"]I also found that Crystal has an 8-ch A/D, the CS5368, with reasonable specs (114 dB dynamic range, see http://www.cirrus.com/en/products/pro/detail/P1089.html ). That chip needs just the crystal (for the on-board oscillator driver), and it's also got the differential inputs ( http://www.cirrus.com/en/pubs/proDatasheet/CS5368_F1.pdf ). Obviously the analog inputs need the differential buffers (two opams / channel). Downside is the 48-pin LQFP (0.5 mm pin pitch) package.[/quote]
I'd forgotten all about that chip. Yes, for a simple barebones 8-channel DIY ADC with local clocking only this may yet be the best solution. Other chips (like the TI PCM4204) look somewhat better on paper, but I suspect those few dB extra dynamic range are easily lost in the digital hash created on a DIY 2-layer PCB. See, the '5368 can be routed straight to the AL1401A (with 22-33R series resistors in all digital lines, naturally), with possibly only a flip-flop somewhere to line up the data to the right clock edge. Even so, all digital lines have exactly one source and exactly one destination, and some of them (like MCLK an BCLK) needn't be routed at all! A design with two PCM4204s (or multiple '5381s, for that matter) must have a multidrop clock distribution, which is much harder to route on a 2-layer PCB, especially if you want to keep one layer a gapless ground plane.

So a small PCB with the '5368, a '1401A, a crystal and eight diff buffers (be it 5532s or OPA1634s) might make a nice DIY project. Two points: (1) as soon as you add external WC/superclock in, much of this advantage goes away, and (2) make sure that all supplies to the '5368 are at their lowest permitted level (ie 3V3 rather than 5V), since that puny LQFP-48 should run as cool as possible. A side effect is that lower interface levels equals less EMI-coupling between your data lines and your analog inputs. You may need a level translator near the '1401A; HCT-logic is plenty fast.

JDB.

 

[Michael Krusch]

I read the Wavefront document about 96k over ADAT (http://www.wavefrontsemi.com/UserFiles/File/AL_Info/ADATOptical96KAddendum1.0.pdf). Is this something the converter chips are supporting or do I need an additional processor to scramble the data? Then a 96k converter with ADATA interface will be more complex.