Ground Loops in PCB design

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abbey road d enfer

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Lots of things can be improved here:
View attachment 91547
I'm quite perplex, as I don't know how you can determine there is a "Trace through slit" and how there is "no easy path" for nodes that I just can't identify.
Isolated copper islands can be deemed academically incorrect, but what are the actual consequences here, compared to the inter-electrode capacitances?
 

Bo Deadly

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We decouple locally to compensate for power trace impedance and to power digital state changes. Some components won't even start without close decoupling. Do you think digital board designers are stupid? We don't do that for nothing!
Most of the discussions here are about small signal audio. When digital is discussed, it's about ADCs, digi-pots and mixed signal sorts of jobs which present some unique challenges that a pure digital design doesn't have to be concerned with. So AFAIC, what you're talking about is easy.
 

abbey road d enfer

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Nobody denies the usefulness of local decoupling, in order to make the loop area as small as possible, but also there is a need to prevent intermingling of currents. To which splitting ground planes is a consistent answer.
 

abbey road d enfer

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However I've moved away from this as a practice to doing fully differential ground layouts, not because I've found them "better" from a noise point of view, but in that they allow for far less routing congestion because it's easier to use both sides of the board fully (with a system that has top traces running left to right/horizontally, and bottom traces running top to bottom/vertically).
My understanding is that it's another way of describing "ground follows signal" or "telescoping ground".
 

Matador

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My understanding is that it's another way of describing "ground follows signal" or "telescoping ground".
Yes, it's this exactly. Rather than a pour, components are placed in the (rough) order in which they process the signal, and ground follows along with it. In practice, I generally have the input / ground pair entering from one side, then following along until it reaches the output/ground pair (hence differential). It's treated like a balanced "pin 2/ pin3" signal where one side happens to be ground.

For layout, this generally means a ground trace on the bottom flowing roughly through the center of the layout, or along the top (or bottom), with short stubs leading to the connections....much like the schematic would be drawn.

Isolated copper islands can be deemed academically incorrect, but what are the actual consequences here, compared to the inter-electrode capacitances?
This was my earlier point: nobody asked Ian how his board performs in practice. It's one thing to spin a board and find a problem that might need a "0V optimization" to fix, but I'm guessing his layout, as-is, probably does everything needed without any measurable/audible issues. If it was broken/unacceptable, he probably would have already revised it further.

Well, software costs close to nothing to revise.
You've obviously never had to pay a software engineer. :)

For us hobbyists, changing a board has almost no monetary consequence, rather the consequence is waiting time (which I guess can be argued is money as well...however as a hobbyist I make relatively little in audio). In fact, I can spin a board and have 5 prototypes of the new design at my door for less than $20 these days in a matter of a week or two.

My (larger) point was: do the best you can, then test it. I think most will find that generally connecting everything properly "just works" (even with a simple ground pour 100% on one side)...at least for small signal audio purposes. I've seen some truly hideous layouts in guitar amps and pedals that were done to minimize production costs (for example, one layer PCB's with a gazillion wire jumpers), that in reality were "just fine".
 

JohnRoberts

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PureBasic said:
Well, software costs close to nothing to revise.
You've obviously never had to pay a software engineer. :)

=====

Software is relatively inexpensive to "update", literally printing new source code to flash memory. To "revise" is an open ended software rewrite that involves engineering.

I have one foot in both worlds and from a manufacturing perspective software changes are cheaper and easier to implement... My last microprocessor based sku was getting software revisions for pretty much it's entire life. The hardware design was frozen pretty early on.

JR
 

PureBasic

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I'm quite perplex, as I don't know how you can determine there is a "Trace through slit" and how there is "no easy path" for nodes that I just can't identify.
Isolated copper islands can be deemed academically incorrect, but what are the actual consequences here, compared to the inter-electrode capacitances?
You can see a trace shadow through the slit.
For the return path, if you follow the copper pour border on the right, you'll see you can't pass anywhere except the two very slight vias border south.
As for the consequence of isle, well it varies from 'meh' to 'big fail'. Long isles catch RF, which is why it's recommended to set the EDA so that it doesn't leaves any unconnected isle.
If you need a ground instead of a hole you stitch it from the other layer pour, and it is recommended to do so because large 'glass' area on a board can make the manufacturing harder.

1646945993816.png
 
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abbey road d enfer

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You can see a trace shadow through the slit.
I don't have your extra-sensory vision...
For the return path, if you follow the copper pour border on the right, you'll see you can't pass anywhere except the two very slight vias border south.
Who says there isn't a strong path on the other side? I can't. The discussion is a bit sterile since we don't see the other layer.
As for the consequence of isle, well it varies from 'meh' to 'big fail'. Long isles catch RF, which is why it's recommended to set the EDA so that it doesn't leaves any unconnected isle. If you need a ground instead of a hole you stitch it from the other layer pour.
That's why I used the word "academically". I would bet the consequences of these islands for theis board are not even benign.
 

ruffrecords

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I will say it again - it is an old version PCB layout - I was not holding it up as an exemplar of good layout practice - it was just meant to illustrate reasons other than EMC for avoiding loops in PCB layouts.

It is also important to rememeber that PCB layout cannot and should not be seen in isolation from all the other engineering factors that need to be taken into account which may affect component placement and tracking.

Cheers

Ian
 

PureBasic

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I don't have your extra-sensory vision...
Lol ye, I Xrayed that board from the picture.
It's there tho. You can see the traces at the IOs the same way.
1647008451237.png
Who says there isn't a strong path on the other side? I can't. The discussion is a bit sterile since we don't see the other layer.
Yup, maybe there is another pour, I hope so. Dunno. Some stitches would have been nice then.
That's why I used the word "academically". I would bet the consequences of these islands for theis board are not even benign.
Sure yes, but OP is a beginer and asked for good practice... That was just an example of one thing you could do to avoid issues. Dual ground pour, via stitching, do not cross splits... Those are things that won't hurt any circuits.

I will say it again - it is an old version PCB layout - I was not holding it up as an exemplar of good layout practice - it was just meant to illustrate reasons other than EMC for avoiding loops in PCB layouts.
No worries, I was not saying the board had to go out the windows neither.
It is also important to rememeber that PCB layout cannot and should not be seen in isolation from all the other engineering factors that need to be taken into account which may affect component placement and tracking.
Exactly ! Integration nightmare :p
 

MidnightArrakis

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OP here just to say this is just an incredible amount of great information
[this is just an incredible amount of great information] -- You're welcome!!! ..... Several comments back I had provided you with several PDF files on PCB design and documentation and some other related materials. Well.....here's a whole bunch MORE!!! ---


The above link goes to a folder that I have on an online web-storage site and it contains about 500MB of PDF files that are ALL related to PCB design, documentation, tips, techniques, routing, etc., for you (and anyone else who is also interested) to download, read, learn, digest and understand so you may become better at the design/layout/documentation of your PCB's. These PDF files are all from leading companies and sources within the specific domain of PCB design and documentation. So, you cannot go wrong with reading and following what is contained within all of these PDF files.

I would recommend making a "PCB Design Reference Material" folder on your hard-drive somewhere and then download either the entire folder that I have or the selected PDF files that are about the subjects and topics that are of interest to you. Then, instead of lurking and prowling the streets late at night and stealing hubcaps off of old classic cars, you can be hunched over your computer monitor reading about how to best place components and route an analog PCB. Reading about PCB design techniques is a whole lot safer, too!!!


HAPPY PCB DESIGNS!!!

/
 

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