Samuel Groner
Well-known member
Hi
I'm currently working on the design of a high performance THD+N analyser. For the oscillator part I'm looking into AGC loops for a state-variable topology. Main requirements are low ripple (for low distortion) and reasonably fast settling time. Here's the current plan: AGC_loop_r1.gif
U1-U3 form the state-variable topology. U6 and U7 make up the rectifier based on the trigonometric identity sin^2 + cos^2 = 1, ideally resulting in zero ripple. U4 sums the square function outputs and the reference level (trimmed by R10). U5 integrates the gain control voltage in order to reduce residual ripple (mainly from U6/U7 errors) and noise. D1 and D2 reduce the integration time constant if the output level of U4 is above some mV to provide fast settling. R8 provides a ripple cancellation trim for low frequencies where the integrator is less effective. The DC gain control signal is fed to U8 (implemented with a pair of opto-resistors and a low-distortion opamp) to provide amplitude stabilisation.
Now a few questions:
* I didn't found a more convincing solution for the square function other than to use four-quadrant multipliers (AD633). Any suggestions for a lower cost solution? I'm aware of the possibility to use norton amplifiers but I don't like the high parts count.
* Is the polarity of the AGC loop correct (i.e. the use of the inverting Y input of U8)?
* Cordell uses another opamp to boost the DC gain of the AGC loop (thd_analyzer.pdf, page 6, IC7 in figure 9). I didn't quite understand the need for this. Anyone?
* In many oscillator designs C3 is paralleled with an series RC (the additional C being much larger than C3), sometimes claimed to improve settling time. How should this work? Any drawbacks?
* It does make sense to use schottky diodes for D1 and D2 as they have lower forward voltages, right?
Thanks for your comments and suggestions!
Samuel
I'm currently working on the design of a high performance THD+N analyser. For the oscillator part I'm looking into AGC loops for a state-variable topology. Main requirements are low ripple (for low distortion) and reasonably fast settling time. Here's the current plan: AGC_loop_r1.gif
U1-U3 form the state-variable topology. U6 and U7 make up the rectifier based on the trigonometric identity sin^2 + cos^2 = 1, ideally resulting in zero ripple. U4 sums the square function outputs and the reference level (trimmed by R10). U5 integrates the gain control voltage in order to reduce residual ripple (mainly from U6/U7 errors) and noise. D1 and D2 reduce the integration time constant if the output level of U4 is above some mV to provide fast settling. R8 provides a ripple cancellation trim for low frequencies where the integrator is less effective. The DC gain control signal is fed to U8 (implemented with a pair of opto-resistors and a low-distortion opamp) to provide amplitude stabilisation.
Now a few questions:
* I didn't found a more convincing solution for the square function other than to use four-quadrant multipliers (AD633). Any suggestions for a lower cost solution? I'm aware of the possibility to use norton amplifiers but I don't like the high parts count.
* Is the polarity of the AGC loop correct (i.e. the use of the inverting Y input of U8)?
* Cordell uses another opamp to boost the DC gain of the AGC loop (thd_analyzer.pdf, page 6, IC7 in figure 9). I didn't quite understand the need for this. Anyone?
* In many oscillator designs C3 is paralleled with an series RC (the additional C being much larger than C3), sometimes claimed to improve settling time. How should this work? Any drawbacks?
* It does make sense to use schottky diodes for D1 and D2 as they have lower forward voltages, right?
Thanks for your comments and suggestions!
Samuel