Low Ripple/Fast Settling AGC For Oscillator

[bcarso]

[quote author="JohnRoberts"]That book is a classic.
JR[/quote]

I have a copy with a dustjacket, with pictures of the three editors on the back. It is hilarious---Tobey with the military crewcut looks like a watchful eagle, Graeme has the classic nerd look, and Huelsman the wide-eyed Arizona professor.

No hippy longhair freaks here, thank you very much! :razz:

Graeme went on to do additional books in the series, all of which have a number of gems within.

 

[JohnRoberts]

Yup, mine still has the dust jacket... and pix..

FWIW, I knew many engineers who looked exactly like them, working at MIT Instrumentation Labs back in late '60s..

Wear you pocket protector proudly nerds of the world..

Smart folk...all.

JR

 

[Samuel Groner]

Just found this AES paper: www.aes.org/e-lib/browse.cfm?elib=14135

Sounds like they use the sum-of-square trick as well.

Samuel

 

[JohnRoberts]

That abstract sounds a little different: "The genius of the present two-integrator design is that it derives its amplitude stability from the cancellation of two square wave signals, of which one is fixed in amplitude, the other proportional to the oscillator output, with a threshold."

Did you look at the paper (I didn't)? The two integrator reference definitely sounds like state variable, but I can't easily make sense of that abstract description of the control loop.

One additional passing thought. If an AGC loop is indeed controlled by Sin^2 + Cos^2, the amplitude being regulated is the product of multiple band passes, not just one. The amplitude probably tracks adequately well between the band passes at resonance to ignore this potential error. Combining multiple band passes for a final output might increase amplitude accuracy but would increase distortion too.

There may be a way to use the trig identity primarily for AC ripple cancellation and focus on the DC contribution from only one bandpass for long term level stability. This may introduce TC issues too but only for long term absolute settling, it could still be relatively quick.

JR

 

[Samuel Groner]

Ah, you're right, I read [...] from the cancellation of two square signals, [...].

Haven't checked it, will do so tomorrow if we have it at the library at work.

If an AGC loop is indeed controlled by Sin^2 + Cos^2, the amplitude being regulated is the product of multiple band passes, not just one.

Don't understand what you're talking about..? Which band passes from where?

Samuel

 

[JohnRoberts]

The Sin^2 + Cos^2 =1 trig identity technique, typically takes the amplitude of the Bandpass and either HP or LP (or both) outputs of a state variable oscillator, squares them, then adds them together. The different band passes could vary relative to each other and still combine to a fixed nominal level when combined. If the signal is taken from only one of these two outputs feeding the control loop there "could" be an amplitude error if the relative level between band passes changes.

I don't expect this to be a serious problem in practice and suspect minimizing distortion is more important than small amplitude errors. I just thought it was interesting and worth pointing out.

For example, tracking errors in a variable frequency potentiometer might be one such source of subtle differences between band passes for different frequency settings. YMMV

Note: There may be other oscillator topologies than SVF that generate quadrature (90' phase shift) outputs but again, when using multiple outputs for amplitude control while only using one for signal output there is a potential for error.

JR

 

[Samuel Groner]

The Baxandall circuit presented in the Vanderkooy AES paper is very unique and interesting. It would need some serious research though to make it (if at all possible) reach my performance goal.

The preprint includes an excerpt on how much positive feedback we need, partially adressing my previous question about R5 sizing. The author assumes that the limiting factor is capacitor loss, calculates an ESR of 145 Ohm for the used 4.7 nF polystyrene part (which seems too high to me) and concludes that [...] we must leave some of these points unresolved.

If the signal is taken from only one of these two outputs feeding the control loop there "could" be an amplitude error if the relative level between band passes changes.

I see--I'm saving for 1% capacitors and switched resistors though, so this should not be a problem for my application.

Samuel

 

[bcarso]

145 ohm is surely a misprint?!

 

[Samuel Groner]

It's not (at least not from my side). The value seems to be three if not four orders of magnitude off. He derived it by removing the positive feedback and measuring the decay time and assuming that no other loss exists. I guess he got the math right (didn't check anything though), but the assumption is wrong.

Samuel

 

[bcarso]

Yeah I meant a misprint in the article (I was sure that that number would have gotten your attention).

That is odd---so this is Vanderkooy writing, not Baxandall being quoted I guess.

Well, John is a bright and wonderfully decent human being, but he does make a blunder or two from time to time, like all of us When he collaborates with Stanley Lipschitz things are usually less assailable. I once told John that I thought he and Stanley made a sort of tough cop/con cop team (with JV the "nice" guy :razz: ).

 

[Samuel Groner]

Some progress on this project: AGC_loop_r2.gif

Shown now is the AGC multiplier with photo resistors, several resistor- and capacitor-values as well as the desired level structure (to operate the oscillator at +12 dBu).

The AGC multiplier features a trim which should allow to decouple the photo resistors as much as possible (assuming they are matched). How well this works within different ranges will need to be determined by experimentation. Perhaps R10 and R11 need lower values.

I would appreciate it if someone could again check the polarity and the level structure of the AGC loop. Any further comments welcome as well.

Mainly as a side note a preview on the composite opamp I'm planning ot use for U1-U3: composite_opamp_r1.gif

Samuel

 

[JohnRoberts]

Interesting.. I am not familiar with 633 so I can't tell you if your control path polarity is right, but that looks simpler than rolling your own ^2 from discrete.

Regarding the distortion trim, I gather that is to bias it right on the edge of oscillation. Could you accomplish the same thing with gain trim on U4? This may not make a big difference in loop sensitivity but does slightly reduce the noise gain of U1.

What is the decision process for setting the nominal current in CR1 and CR2? Could the 2Ks be made larger? I'm not sure that's even desirable if it increases loop sensitivity.

In the SVF oscillators I've played with I start with some fixed NF for the bandpass section, and then vary positive feedback as needed. This looks good, but it's way past where I'd have to breadboard something up...

Good work.

JR

 

[Samuel Groner]

I am not familiar with 633 so I can't tell you if your control path polarity is right.

Oh, that's just a standard multiplier which follows the formula given in the yellow boxes.

Regarding the distortion trim, I gather that is to bias it right on the edge of oscillation.

Yes. The main idea is to have equal voltage across and equal resistance from the photo resistors as this will cancel their voltage coefficient if the cells are matched. It's probably most easy to trim for U8's output being near zero volts.

Could you accomplish the same thing with gain trim on U4? This may not make a big difference in loop sensitivity but does slightly reduce the noise gain of U1.

I think it's not exactely the same thing but the difference might be small with respect to resulting distortion as in practice photo cell mismatch will likely limit cancellation even if they are selected parts. But R10/R11 will need to be made equally small as R7/R8 to get the same loop correction range, so this will remove the U1 loop gain advantage.

What is the decision process for setting the nominal current in CR1 and CR2?

At the current state of knowledge it's educated guesswork. The intended part (Silonex NSL-32SR2) has an usuable Ohm range from 0.1 mA to 10 mA, so the shown 2k provides a convenient matching range for standard supply rails.

Samuel

 

[Samuel Groner]

Bump--any thoughts on the loop polarity?

Samuel

 

[JohnRoberts]

I would have to look more closely inside 633s to be confident, but It looks correct if 633 literally do the math..

633 putting out a positive voltage, causes positive voltage at loop output, which reduces upper positive feedback path and increases lower negative feedback path.

So osc level should stabilize when 633 output matches negative current pulled at level trim.

JR

 

[bcarso]

EDIT: writing while John was posting...

Thoughts? Walk through it:

Suppose levels at SIN and COS go up. Multipliers square (hence >0 always, except for offsets). So inputs to U7 go up, output goes down. U8 negative-integrates and output ramps up. LED in OR2 turns on. R13 value goes down, increasing input to U1. Polarity of signal from U1 input to U4 output is net inverting (3 inversions, including one negative integration). So, without exploring stability margin issues with the overall control loop, level tends down. As was to be hoped.

Insight: with the very high Q of the SVF, the stabilization loop behavior is going to be strongly influenced by that resonance. It is not clear to me at a glance what the error integrator really wants to be, but someone good at this stuff could figure it out. And of course there's simulation, but it is taxing since the time scales are wide-ranging: you hardly want to make the step sizes too large if you want to know how well the oscillator is working w.r.t. distortion etc., but that means you are going to have a very long compute time with Spice. You will be helped by doing a careful job of setting as many initial conditions as close to the guessed equilibrium values as possible.

 

[Samuel Groner]

Thanks. :thumb:

It is not clear to me at a glance what the error integrator really wants to be.

Don't understand what you are pondering about--can you elaborate?

Samuel

 

[bcarso]

Meaning what the values for R's and the C should be, or what more complex networks may be required for good settling performance.

 

[Samuel Groner]

Unfortunately the progress on this design is slow, but at least not zero. Upon studying the recently published AP System One schematics I derived an additional circuitry to speed up settling by means of additional positive/negative feedback being switched in when the amplitude error exceeds a certain threshold in either direction. The availability of an essentially instantaneous error voltage from U7 (see last posted conceptual schematic above) greatly aids things here.

Before I go into the details of this I'd like to have your opinion on the polarity of the AGC loop again. I'm still somewhat confused about it, particularly as I think that Cordell does use the opposite polarity. Consider the following schematic (taken from his Build a High Performance THD Analyzer, page 6): cordell_AGC.gif

If we assume too high output amplitude the rectifier output (Q3/Q4 emitter) goes up. So does the output of the low-pass filter IC6, and the integrator output IC7 goes down. Now this turns JFET Q1 off, which makes the multiplier around IC3 inject a positive copy of IC2 output into IC1 input. Now I'm confused what this means relative to IC2 output. IC1 inverts the signal again, but what does the integrator to it? It's inverting, but there's some additional 90° shift from the integrating action. So what--does the injected correction signal increase IC2 output or decrease..? As the shown schematic is apparently working one might conclude that it will decrease the amplitude. But note that the polarity of the control loop is right the opposite of what I've shown in the last schematic and what we considered to be correct. Any help here..?

I think the answer might be that we're not actually changing the amplitude per se but rather the Q of the filter. But is there a particular reason why we don't directly implement an amplitude control by taking the multiplier imput from the sine output and not the cosine? Any input greatly appreciated, thanks.

Samuel

 

[JohnRoberts]

Unfortunately the progress on this design is slow, but at least not zero. Upon studying the recently published AP System One schematics I derived an additional circuitry to speed up settling by means of additional positive/negative feedback being switched in when the amplitude error exceeds a certain threshold in either direction. The availability of an essentially instantaneous error voltage from U7 (see last posted conceptual schematic above) greatly aids things here.

Before I go into the details of this I'd like to have your opinion on the polarity of the AGC loop again. I'm still somewhat confused about it, particularly as I think that Cordell does use the opposite polarity. Consider the following schematic (taken from his Build a High Performance THD Analyzer, page 6): cordell_AGC.gif

The polarity of agc in R2 looks correct to me. Low osc output causes pos output swing at u7, neg at u8, more conduction at OR1 which is positive feedback.

If we assume too high output amplitude the rectifier output (Q3/Q4 emitter) goes up. So does the output of the low-pass filter IC6, and the integrator output IC7 goes down. Now this turns JFET Q1 off, which makes the multiplier around IC3 inject a positive copy of IC2 output into IC1 input. Now I'm confused what this means relative to IC2 output. IC1 inverts the signal again, but what does the integrator to it? It's inverting, but there's some additional 90° shift from the integrating action. So what--does the injected correction signal increase IC2 output or decrease..? As the shown schematic is apparently working one might conclude that it will decrease the amplitude. But note that the polarity of the control loop is right the opposite of what I've shown in the last schematic and what we considered to be correct. Any help here..?

The Cordell AGC, for low osc output, IC6 is low, IC7 is high, which increases gain of IC3 for positive feedback...  Looks similar to me.

I think the answer might be that we're not actually changing the amplitude per se but rather the Q of the filter. But is there a particular reason why we don't directly implement an amplitude control by taking the multiplier imput from the sine output and not the cosine? Any input greatly appreciated, thanks.

Samuel

I don't follow these questions.

AGC changes gain of positive feedback path to sustain oscillation..

Amplitude control in Cordell is full wave rectified to reduce ripple.

Sin^2 + cos^2 promises even less ripple.


JR