SMT rework

[Andy Peters]

So the two engineers working on a board (one being me) fscked up the power connections for the configuration logic section of an Altera FPGA in a BGA. A ball on the package was connected to the wrong power supply rail, and as such the FPGA wouldn't configure.

The balls all have the little dog-bone routing escapes. The power pins connect to the appropriate plane through a via from the dog bone.

It was a 10-mil via with a 20-mil pad. Our ace technician drilled out the barrel of the via that connected the trace to the plane, leaving most of the via pad intact. He then put a dab of conductive epoxy into the hole, and stuck a thin wire in, and let it cure.  This made the electrical connection between the wire and the via pad. After cure, he tacked the other end of the wire to a pad of the correct power rail.

I powered it up with my JTAG programmer attached, and voila -- the part configured right away. And I was also able to program the configuration EEPROM. And now I can get on with debugging the design ...

So all of you who are complaining that "SMT REWORK IS HARD, WHINE WHINE WOE IS ME THRU-HOLE OR BUST" can just go sit in the corner and be quiet.

-a

 

[JohnRoberts]

Are you saying that wasn't hard?  ;D

You guys need to each buy that tech a beer, or several.

I had enough pain dealing with layout mistakes in inner layers of 4 layer PCB...  similar remedy, drill out the via (if it isn't hidden) and jumper connections on top/bottom, but layout matters around switching PS, and codecs, so still need to go for another cut to prove the design.

JR

 

[john12ax7]

If we all had ace technicians to assist us there would less reason to complain 

 

[Matt Nolan]

Luxury! When I were a lad we had to do Focussed Ion Beam milling and metal vapour deposition on ASIC prototypes to prove a metal-layers only bug fix using a couple of spare cells.

 

[pucho812]

Give that man a raise.  8)

 

[JohnRoberts]

Some of us started out as lowly technicians, so rescuing engineers is old hat.  8)

JR