Mic Preamp Schematic Collection

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Found out what was going wrong in the simulation: I used a NE5534 without compensation cap in an attempt to get a worst-case stability estimate. Unfortunately this made an essentially ideal opamp out of it (with very high GBW and no phase shift) :evil: . With a 22 pF added, we're back.

Another thing: Is my thinking right that the input impedance of the inverting input can be well approximated by calculating the emitter impedance Re = 25/Ic/1000? If so, this would give a good indication above which gain the o/l gain stops increasing proportionally (I still owe the THD measurements on this). For the standard transformerless designs it's rather uncritical, but design F has an input imedance of 500 ohm which would start to limit things pretty early.

Samuel
 
[quote author="Samuel Groner"]Found out what was going wrong in the simulation: I used a NE5534 without compensation cap in an attempt to get a worst-case stability estimate. Unfortunately this made an essentially ideal opamp out of it (with very high GBW and no phase shift) :evil: . With a 22 pF added, we're back.

Another thing: Is my thinking right that the input impedance of the inverting input can be well approximated by calculating the emitter impedance Re = 25/Ic/1000? If so, this would give a good indication above which gain the o/l gain stops increasing proportionally (I still owe the THD measurements on this). For the standard transformerless designs it's rather uncritical, but design F has an input imedance of 500 ohm which would start to limit things pretty early.

Samuel[/quote]

I am not of any help for sim questions.

Regarding the input impedance of an opamp's inverting input, it depends on impedance from output to input divided by loop gain so it will be a curve not a single value.

The input impedance of the transistor stage without feedback would just be emitter load divided by Hfe, but feedback holding emitter current constant will bootstrap the impedance there so it too will have a term associated with open loop gain.

I don't know if this helps, I'm not very clear on your actual question.

JR
 
I'm not very clear on your actual question.
If you look at this topology as a current feedback architecture the impedance of the inverting input is pretty important as any impedance associated there will appear in series with the feedback network impedance and hence limit the amount of o/l gain increase at higher gains. So it would be cool to have a simple estimate of this figure.

I was able to run the promised distortion measurements today. It's essentially pointless to measure THD+N at higher gains as most of the reading is pure noise. With spectral analysis I could resolve some distortion, though the AP System 1 is pretty limited FFT-wise as the AD converter has pretty high distortion itself.

The preamplifier under test was a slightely modified GreenPre, based on the transformerless topology discussed here. The output stage runs at a gain of +6 dB and the frontend is variable from 0 dB to 66 dB.

At gains at and below 60 dB, 2nd harmonic was at or below 0.0025%. At 66 dB I got 0.0032% and for 72 dB 0.0045%, everything at +20 dBu output level, at 10 kHz and with 50 ohm source impedance.

At the lowest gain (6 dB) THD+N was 0.00045% (within the audio range, +20 dBu output level, 400 Hz-20 kHz BW, 50 ohm source impedance). From this figure we can guess that the actuall distortion increased at least 10x when going from the lowest gain setting to the highest.

Distortion from the large electrolytic capacitor in the feedback network was clearly measurable in the THD+N figure below about 50 Hz, altough I did not write down the actual number.

Sure, the distortion is still relatively low at the highest gain, but for the moment I conclude that there is some justification for considering dual stage architectures if lowest distortion at high gains is called for.

Samuel
 
I updated the first post to include design G. Still working on a conclusive second revision for design F.

I'm not very clear on your actual question.
If you look at this topology as a current feedback architecture the impedance of the inverting input is pretty important as any impedance associated there will appear in series with the feedback network impedance and hence limit the amount of o/l gain increase at higher gains. So it would be cool to have a simple estimate of this figure.
Another perception of the problem: the increase of o/l gain is limited to the transconductance of the input stage transistor(s). Transconductance is directly proportional to collector current, so architectures using low collector current suffer more from o/l gain reduction.

Samuel
 
[quote author="Samuel Groner"]I updated the first post to include design G. Still working on a conclusive second revision for design F.

I'm not very clear on your actual question.
If you look at this topology as a current feedback architecture the impedance of the inverting input is pretty important as any impedance associated there will appear in series with the feedback network impedance and hence limit the amount of o/l gain increase at higher gains. So it would be cool to have a simple estimate of this figure.
Another perception of the problem: the increase of o/l gain is limited to the transconductance of the input stage transistor(s). Transconductance is directly proportional to collector current, so architectures using low collector current suffer more from o/l gain reduction.

Samuel[/quote]

Perhaps I'm just too lazy/busy to figure out what you're asking.

wrt #G from a quick glance it looks like you need to get your gain switch sorted.
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Input stage transconductance of a LTP is a product of operating current and differential input voltage, but emitter degeneration resistors and feedback loops holding the operating current constant, makes it IMO more a matter of simple resistor ratios.

I agree there is a bit of confusion with when to ignore the loop effects on static impedance but like I said I'm not the guy to make sense of simulation issues.


JR
 
Question; In design G, the two 6800uF caps are in parallel with opposite polarity. Is that because a non-polarized cap would be needed, because there is a DC potential of unknown polarity across the gain set resistor?

Sorry if that is worded unclearly. Thanks again for sharing. Waiting to see what happens with design F.... :green:
 
[quote author="mediatechnology"]skipwave - I don't see that on his G post.[/quote]

Of course you didn't, because it's in C. :oops:

Thanks for the explanation.
 
In design G, the two 6800 uF caps are in parallel with opposite polarity. Is that because a non-polarized cap would be needed, because there is a DC potential of unknown polarity across the gain set resistor?
The reasoning behind the arrangement is the hope for some cancellation of asymmetric secondary effects such as distortion etc. I did neither think things through nor did I run any tests to confirm the cancellation mechanism and I wouldn't be surprised to not see it happen at all (or perhaps even getting an addition instead). But as it's free and without obvious disadvantages it seemed worth a try. And AMEK did it as well in the last large console.

Waiting to see what happens with design F...
I'm sorry that it's just the design you want to build which got wrong. The correction is on the way though--I have worked out a compensation arrangement similar to the SSL 9k providing very good o/l gain even at the highest gain setting. Just need to do the final breadboard-tweaking.

Samuel
 
Somewhere in regards to PRR's design, he explained that a bipolar cap was needed in series with the gain set resistor.
EDIT: Link fixed to jump to post with schematic:
http://www.groupdiy.com/index.php?topic=2074&postdays=0&postorder=asc&start=92
When saw Samuel's anti-parallel caps, I thought it might be for the same reason. And yet, I see in other designs a gain set resistor between the emitters of the input pair with just a single polarized cap. Was there something different going on in PRR's design that is not present in these designs?
 
Sorry, I forgot how confusing and long that thread was. I always compile the relevant posts into a doc for formatting and printing.

PRR Schematic

[quote author="PRR"]Another problem: on paper, all the DC can balance. In fact, the two input devices are never going to be exactly matched. Using the monolithic matched-pairs, there will be several milliVolts of offset across the gain-set resistor, partly Vbe mismatch but mostly base bias resistor and Beta mismatch. That might be tolerable in a fixed-gain amp, but one sweet feature is the simple way we can change gain from around 1,000 to about 1. But this really needs a switch (there is no pot with over 60dB range and under 1 ohm minimum usable setting), which will want to interrupt that milliVolt offset and make milliVolt pops, which when amplified by gain=1,000 will be awful loud.

So we need a DC blocking cap in series with the gain-set resistance, which needs to be very low. And since it has an unknown DC polarity (+ or -) across it, it needs to be bipolar. What is the biggest nonpolar cap I can conveniently buy? DigiKey lists a Panasonic 6,800uFd nonpolar, at a tolerable price. When faced with a 1 ohm resistor, this gives -3dB at 26Hz, -1dB at 52Hz. That's at maximum gain; bass response improves as gain is reduced. And since high gain tend to bring up room rumble, I'm not sure we really want 2Hz bass response at maximum gain, though it is useful at lower gains. [/quote]

He mentioned the THAT 300 matched arrays as a possibility. I wonder how well they would perform in this regard.
 
Connecting two polar capacitors in parallel with reversed polarity will IMO do little to cancel distortion, if anything it will only insure distortion from both polarities of signal swing if terminal voltage rises high enough. The good news is that DC voltage offsets between these circuit nodes are typically milli-Volts and if properly sized these caps will not see significant terminal voltage in use.

Connecting two in parallel (either polarity) will halve ESR, ESL, and double C.

FWIW back when I was in the mixer business I had to compete with a well regarded (according to their advertising) manufacturer who undersized this gain leg capacitor on one or more small mixers. It fooled the consumers into thinking the preamp was cleaner and quieter than it really was since LF response tailed off at high gain settings, attenuating 1/F and LF noise in general. Since their published frequency response and LF distortion measurements were made at lower gains this was and is not common knowledge (caveat emptor).

This may be much ado about nothing in responsible designs as terminal voltages should be mV level, and breakdown effects occur above some voltage threshold or knee. In Tantalum capacitors this knee is something like 15% of rated forward voltage, in electrolytic I've seen it stated as 1 or 1.5V. This knee effect is influenced by temperature (worse hot) and past stresses (at least in tantalum where previous stress reportedly reduces knee voltage).

As I previously posted I am also concerned about ESL in these large value caps when working into such low resistances. It may also be worth using something other than the smallest rated voltage you can buy, especially if using tantalum.

I still favor the no capacitor approach but there is a complexity cost that will keep these in value designs. Value customer will quickly object to the very audible gain pot wiper noise, while being blissfully ignorant of the other potential compromises. So I suspect polar capacitors in this circuit node will be with us for a while.

JR

Note: Using polar capacitors in series with polarity reversed generally prevents reverse breakdown as the leakage in the reversed cap charges up the forward cap reducing that reverse voltage. I guess some clamp diodes in parallel could add some extra insurance while I doubt they would ever conduct.
 
One note: If you run a "lytic at a reverse voltage long enough, assuming that it doesn't blow up, it will eventually reform and the leakage will asymptotically decline.

This happened to me once in an OEM multimedia product. Discovered after a fair number of systems had shipped, the power supply bypass local to a uC and LED display had its silkscreen reversed, and the assemly house had happily installed the part in accordance. When we discovered it we got quite concerned (can you say very expensive recall?) but observations showed that they weren't blowing up (the current was limited fairly precisely anyway) and they were not dragging the rail down very much. And in the space of a few hours the leakage had declined to where it was no longer a concern. Whew!
 
[quote author="bcarso"]One note: If you run a "lytic at a reverse voltage long enough, assuming that it doesn't blow up, it will eventually reform and the leakage will asymptotically decline.

This happened to me once in an OEM multimedia product. Discovered after a fair number of systems had shipped, the power supply bypass local to a uC and LED display had its silkscreen reversed, and the assemly house had happily installed the part in accordance. When we discovered it we got quite concerned (can you say very expensive recall?) but observations showed that they weren't blowing up (the current was limited fairly precisely anyway) and they were not dragging the rail down very much. And in the space of a few hours the leakage had declined to where it was no longer a concern. Whew![/quote]

I'm pretty sure this isn't the case for tantalum where the reverse bias causes a physical change to the dielectric that finishes as short circuit. Perhaps aluminum dielectric?

I recall back in the '70s discovering a reverse installed aluminum part across a modest voltage divider and didn't have a robust enough failure mode to justify a recall.

JR
 
I think it probably still had capacitance while reforming, although I didn't check. There was no circuit malfunction at least, but the uC may have been quite forgiving (there was a 100nF across as well IIRC).

Not sure about tantalums---these were Al.
 
I gave up on waiting for those two free hours needed to breadboard the latest detail on the new revision of design F, so I simply linked the schematic in the first post. It's very well behaved in simulation (with realistic opamp models this time) and simple theory indicates proper stability as well so I guess it's fine now.

The compensation scheme used provides very high o/l gain even at the highest gain setting, at the cost of slightly reduced noise performance at low gains in comparison with revision 1. The RC network C7/R21 and C8/R23 might look rather unconventional for a current feedback topology but is needed to eliminate closed loop peaking due to the two-pole compensation scheme.

Samuel
 
I also recently corresponded with Walt Jung who did some of the original ADI SSM2017 protection work. 1N4148s will pop here and 1N400X-series most likely will too.

Here's what I actually said in an email (quoted verbatim):

I looked at the thread for your floating rail preamp. Very ambitious it is. I'd be very worried about zapping the front end with phantom power ON/OFFs, etc. Has this been an issue? I remember doing the tests on the SSM2017 mic preamp circuit to qualify the protection zeners. We used high power MOSFETs, switched to gnd. That warmed the Z's up a bit, but they did do the job.

The work being described above went into ADI app note AN-242, apparently now out of print. The clamp zeners were 1N750 series types. No 1N4148's, no 1N400x's anywhere. The protection circuit is also found on the ADI OP176 DS (a part which is also obsolete like the SSM2017, but the DS is still available).

To me at least, email conversations are considered private. Quoting or paraphrasing from them isn't done without the knowledge and permission of the originator.

wj
 
I re-read Jung's e-mail and he qualfied zeners of an unstated wattage which he commented got rather warm in their repeated fault test. They may have been 500 mW units.

I don't see anywhere in the email quote in question that the zener type was mentioned. Your comment above is fuzzy at best. That's why I specifically mentioned the AN242 and OP176 DS as sources of info. Facts are facts, and fuzzy language (They may have been).. serves no one, right?

Email is private. Period.

wj
 
I'm confused though: I see the diodes are in series. But are they from the 1N750 series meaning 1N750, 1N751, 1N752 or do you mean series-connected?
I do mean both. The schematic is correct as drawn w/respect to the diodes Z1-Z4, and they are intended to be from this 1N series. Obviously, they must conduct (on surges) at a voltage appreciably less than the SSM2017 rails, and preferably well under 10V. It turns out that zeners of this type have a minimum of dynamic Z at voltages around 6V, so 1N752 - 1N754 etc. would be referred. The Z can be only a few ohms.

Under a (+) or (-) surge/clamping condition, one zener conducts fwd, one reverse. Surge current is limited primarily by Rp1, Rp2. Large wattage zeners could also be used, but will have appreciably more non-linear C, which isn't at all desirable. Similarly, (+) (-) biased zeners might be used, with a low-C diode bridge coupling to the input signal nodes. This would however place a burden on the diodes in the bridge.

The diodes Z1-Z4 seemed to offer simplicity and good functionality for this application. Tests for distortion added due to non-linear C were negative, and repetitive input surge tests with a MOSFET dynamic load did not reveal problems. Since the diodes survided these tests, it would seem that typical studio use of engaging/disengaging phantom power would be safe.

Thanks for the welcoming comments to the board.

wj

PS: I'm curious. Why is there a tendency to copy/post the IP of other parties (admittedly with atttribution, in this case), when a simple URL would do, and would also provide the entire context of the cited DS? That is, why not just http://www.analog.com/UploadedFiles/Obsolete_Data_Sheets/1134125OP176.pdf
 
It's been a while since I visited this thread. Wayne asked me to add the scans of the Jung-Markell-circuit that I made a while ago also here (hope this was the intended spot).

edit: // removed //

There may be better quality scans in the future (from WJ).

edit: yes indeed, see: http://waltjung.org/whatsnew.html

Enjoy,

Peter
 
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