Mic Preamp Schematic Collection

[JohnRoberts]

From a quick glance I'd be nervous about the stability of version F. The 2k feedback resistors driving into the 56k collector load resistors are adding a positive voltage gain of 28x in the negative feedback path. The 15pF from output to minus input will help stabilize that stage but doesn't start rolling off until around 190kHz so may be too little/late.

I have seen a few dB of gain used in this path before with that general topology but not almost 30 dB. Are you confident this will not oscillate?

JR

 

[Samuel Groner]

Isn't the collector resistor bootstrapped by the according opamp and hence a high impedance current source anyway (mostly independent of it's original resistive value)?

Samuel

 

[JohnRoberts]

[quote author="Samuel Groner"]Isn't the collector resistor bootstrapped by the according opamp and hence a high impedance current source anyway (mostly independent of it's original resistive value)?

Samuel[/quote]

My understanding of why that topology delivers such good performance at high closed loop gains is because the effective common base gain of the input transistor "adds" to the opamp's open loop gain. The voltage swing at the collector will be small because it is reduced by total open loop gain.

For stability analysis imagine the base is shorted to ground. X volts of change at the opamp output will result in 28x volts at the collector and thus the minus input. This is similar to having a common base transistor gain stage in a simple negative feedback path. The 15 pF directly across that feedback loop will eventually shunt that down to unity gain but probably too late for what looks like a bifet opamp with maybe 3 MHz (?) GBW.

The forward open loop gain is further boosted wrt differential inputs by the gain resistor between the two emitters. As you can imagine the total differental OL gain is indeed rather large, but opamp stability only cares about the local collector load divided by local feedback resistor. This ratio is nominally targeted for around unity or less if using a decompensated opamp.

I have seen stable implementations with maybe +3 dB in that path but never 20 dB+. I am speculating and opinion vs. reality will only be revealed on the bench. Making the 15 pF (much?) larger might stabilize it, but I'd be worried then about the impact on forward differential gain. If the 56K is required for reasonable DC operating point at such low current density perhaps a 2K in series with a 54K and cap decoupling the junction of those two to a suitable circuit ground could kill some of that excess OL gain at HF. Alternately connecting the feedback stability cap to that junction might work, but I've never seen or tried that. I like to see at least 5-10pF right at the minus input to handle collector capacitance and such.

JR

 

[Samuel Groner]

John, I spent a good deal thinking about your point of view but I simply can't agree. In simulation, I shifted the collector resistor over a 100x range with according adjustment of the opamp noninverting input bias for constant collector current. The result was a rock-solid 10 MHz amplifier bandwidth for all configurations (using ideal opamps to incorporate the very high CM voltage for some configurations). In addition to this, I checked the collector impedance--very high at low frequencies [edit: it's not that high--about 2.2 k in the configuration simulated] and reduced by the 15 pF compensation capacitor at high frequencies, independent of collector resistor value.

My interpretation of this topology is a current source loaded common emitter input transistor, fed into an integrator. The current source load is accomplished by the opamp forcing the collector resistor to constant voltage drop. The integrator consists of the opamp and the compensation capacitor. The o/l gain and hence bandwidth remains constant for different collector load resistors because the integrator changes its gain proportionally to the current source impedance.

This means that we can choose the collector load resistor freely for the needs given by the CM input range of the opamp and the required collector current.

Unfortunately my circuit analysis knowledge is somewhat limited (not having studied EE) and often based on experience and simulation, not sound theory. So if you (or others) have further notes on this subject or can pinpoint errors in my elaboration I'd greatly appreciate your contribution!

Samuel

 

[JohnRoberts]

[quote author="Samuel Groner"]John, I spent a good deal thinking about your point of view but I simply can't agree. In simulation, I shifted the collector resistor over a 100x range with according adjustment of the opamp noninverting input bias for constant collector current. The result was a rock-solid 10 MHz amplifier bandwidth for all configurations (using ideal opamps to incorporate the very high CM voltage for some configurations). In addition to this, I checked the collector impedance--very high at low frequencies [edit: it's not that high--about 2.2 k in the configuration simulated] and reduced by the 15 pF compensation capacitor at high frequencies, independent of collector resistor value.

My interpretation of this topology is a current source loaded common emitter input transistor, fed into an integrator. The current source load is accomplished by the opamp forcing the collector resistor to constant voltage drop. The integrator consists of the opamp and the compensation capacitor. The o/l gain and hence bandwidth remains constant for different collector load resistors because the integrator changes its gain proportionally to the current source impedance.

This means that we can choose the collector load resistor freely for the needs given by the CM input range of the opamp and the required collector current.

Unfortunately my circuit analysis knowledge is somewhat limited (not having studied EE) and often based on experience and simulation, not sound theory. So if you (or others) have further notes on this subject or can pinpoint errors in my elaboration I'd greatly appreciate your contribution!

Samuel[/quote]
I guess we will agree to disagree. My apologies to the list for wasting more bandwidth on this hypothetical but I still can’t see it any other way.

I am not familiar enough with how simulations come up with their estimates to respond intelligently to your findings there. Any further discussion from me in general would be repetitious.

I don't know of any references to suggest. Reading what I wrote on the subject back in the early '80s wouldn't add anything new. Did the Cohen AES paper discuss stability constraints? I don’t recall reading it at the time and I’m too lazy to sort through my stack of old AES journals to find it now..

Perhaps someone will put iron to solder and put this to rest. I'm not suitably motivated at this time. Maybe "after" somebody claims it works on the bench and I need to post my mea culpas.

JR

 

[skipwave]

Samuel - Thank you. It is incredibly generous of you to share your designs.

[quote author="mediatechnology"]

Design F now online--see first page!

And it's fully-balanced from head to tail as well.[/quote]


Regarding Design F. Aside from the general benefit of having a fully differential topology throughout, why did you choose to make this design completely balanced?

Was this done to allow offset trimming at the frontend? I see the note about trimming R12 for -0.1V offset, but this offset is still significant enough that we need output capacitors.

Also, would this design do well with lower turns ratio input transformer? As low as 1:2 or 1:3.5?

 

[skipwave]

Could Design F work with OP275 in place of OPA2134? These have been cited as substitutes for one another.

Also, are there any details to pay particularly close attention to in building this design? Samuel mentions keeping the gain switching arrangement tight. Anything else?

 

[Samuel Groner]

Perhaps someone will put iron to solder and put this to rest. I'm not suitably motivated at this time.

My motivation is not high either, simply too many more pressing projects and recordings to do. Nonetheless, I'll see if I can find some free minutes to spend on some breadboarding.

Aside from the general benefit of having a fully differential topology throughout, why did you choose to make this design completely balanced?

I'm not sure what you consider the "general benefit" of a fully balanced topology, so let me simply list a few thoughts on this:
* 6 dB more maximum output level
* very good rejection of ground noise and power supply ripple (at least if you run the output in a balanced input)
* potential cancellation of even-order harmonic distortion
* usually significant improvement on input CMRR (about 20 dB) compared to unbalanced loading of the input transformer

We should be aware of the disadvantages as well though:
* higher noise (with proper care excess noise can be low though)
* the output opamps see higher loading compared to an impedance balanced output (e.g. each opamp drives 300 ohm for a 600 ohm load), which might increase distortion a bit
* the input transformer might show higher distortion compared to unbalanced loading (according to personal communication with B. Whitlock)

Was this done to allow offset trimming at the frontend? I see the note about trimming R12 for -0.1 V offset, but this offset is still significant enough that we need output capacitors.

The problem with this offset is its driftyness (cool word, no? :green: )--it depends on transistor Vbe and beta, both pretty temperature dependent, so you can't simply trim it to zero and be done with it. I chose to trim this offset to -100 mV in order to polarise the output capacitors correctly at any temperature.

Also, would this design do well with lower turns ratio input transformer? As low as 1:2 or 1:3.5?

Basically yes. For best noise performance you'd need to change the collector current of the input transistors though. If you are interested and have a specific transformer in mind, let me know and I'll point you to the necessary changes.

Could design F work with OP275 in place of OPA2134? These have been cited as substitutes for one another.

The OP275 has very limited input common mode range, and that's of serious disadvantage here (it might not work at all here if simply dropped in). But again that could be changed by providing different resistors defining the collector currents.

Also, are there any details to pay particularly close attention to in building this design?

It's always cool to keep the input at a good distance from the output to avoid positive feedback at high gains. The power supply bypass capacitor should be located close to the opamp. In addition to this, I prefer to build things on a dual-layer PCB as this well keep routing thight and allow for ground planes.

BTW, I just checked the measurement data on the 2N4403 given in Motchenbacher, and they agree very well with the values I gave earlier in this thread.

Samuel

 

[skipwave]

Thanks for the answers Samuel.

I ordered a couple OPA2134.

 

[Samuel Groner]

Really? I find that suprising. Did he give a reason?

I remembered wrong--he mentioned frequency and phase response. I once posted the full conversation in this thread:
www.groupdiy.com/index.php?topic=9727

Samuel

 

[Samuel Groner]

In his answer he mentioned that some Lundahls he thought prefered balanced connection.

That's my addition, based on the according datasheet. His writing is set in italic.

Samuel

 

[skipwave]

Thanks for the general discussion of differential pros and cons. I had assumed the pros, but not considered the cons. I realized, too, that I've only seen differential designs with transformerless inputs. Now it makes sense why F is a mixture of transformer and trasformerless design concepts.

That's very interesting about the Jensens being constructed to have the specified end of the secondary grounded. I was thinking about a JT13k6 for this design, maybe now I'll try a Beyerdynamic instead.

 

[Samuel Groner]

Finally found some time to breadboard design F. And I was wrong.

A 2k in parallel with the 56k collector resistor made things stable, with little ringing on a 100k square wave. Adding a 1 nF in series with the 2k (to get us back to the required collector current) increased the ringing quite a bit (though this might have to do with the in the meantime pretty messy breadboard layout), with no change when using a 10 nF instead. Adding a 10 pF in parallel with the feedback network improved on this. I'll update the schematic ASAP.

Unfortunately I still don't see where the error in my understanding of this topology is--why the heck does the collector load not act as a current source if the voltage drop is held constant across it? Neither do I understand why SPICE should get things that wrong here. If someone could shed some light on this I'd greatly appreciate it!

Samuel

 

[JohnRoberts]

[quote author="Samuel Groner"]Finally found some time to breadboard design F. And I was wrong.

A 2k in parallel with the 56k collector resistor made things stable, with little ringing on a 100k square wave. Adding a 1 nF in series with the 2k (to get us back to the required collector current) increased the ringing quite a bit (though this might have to do with the in the meantime pretty messy breadboard layout), with no change when using a 10 nF instead. Adding a 10 pF in parallel with the feedback network improved on this. I'll update the schematic ASAP.

Unfortunately I still don't see where the error in my understanding of this topology is--why the heck does the collector load not act as a current source if the voltage drop is held constant across it? Neither do I understand why SPICE should get things that wrong here. If someone could shed some light on this I'd greatly appreciate it!

Samuel[/quote]

I can't explain why SPICE does anything but back to the circuit. Yes the collector is a current source but the resistor termination takes the current there and converts it to a voltage. Open loop it looks like a voltage source with a source impedance equal to the resistor. If you factor in the effects of opamp feedback it looks like a low impedance voltage source equal to the voltage at the opamps + input. Regarding stability I've mentioned before, from the perspective of the opamp, the input transistor looks like a common base gain stage in it's feedback path.

A cap coupled 2K resistor in parallel with the 56K should be adequate to effectively reduce excess loop gain at HF. A small value C at C4/C5 will also help stability. Any C across R18/19 is again adding to HF loop gain so IMO undesirable.

(edit) I just noticed that C6 (+ input decoupling) is connected to VEE and not AGND. If your 2K + 1nF RC is connected to a different AC ground than C6 it may be less effective to increase stability. I would prefer both C6 and 1nF be connected to AGND.

JR

 

[Samuel Groner]

Yes the collector is a current source but the resistor termination takes the current there and converts it to a voltage. Open loop it looks like a voltage source with a source impedance equal to the resistor.

I see, makes more sense now! :thumb:

I wonder how they go about that in precision instrumentation amplifier ICs where we have low collector current but can't afford large capacitors to implement that RC network?

I would prefer both C6 and 1 nF be connected to AGND.

Can you elaborate on the advantages of grounding C6? The way I've drawn it allows C6 to have low rated voltage and hence size. On breadboard, I connected the RC network to VEE, not AGND.

Samuel

 

[bcarso]

As far as further insight into the stability issues and Spice, I would contrive a circuit to look at open-loop gain and phase. Stabilize however you must at d.c. (something sims can do that is difficult on the breadboard) and make sure you have an accurate model of the opamp too. Make sure that the gain bandwidth of the transistor is accurately modeled and get all of the capacitances in there, including some good guesses about package and board parasitics.

Typically the opamp will be internally compensated to hold its phase margin out to about or just beyond the unity gain crossover freq. If you add additional voltage gain, no matter how flat, you lift the whole affair so that the opamp parasitic poles are in >unity gain territory. Sometimes it is possible to extend things with a compensating zero for another octave or so but beyond that lies madness, usually. It becomes time for another opamp, one which has the requisite 6dB/oct rolloff well beyond unity-gain crossover---hand-rolled current-mode perhaps?

The basic configuration resembles a logarithmic amplifier using the transistor as a "transdiode". There are some papers discussing the stability margin challenges, starting with the impracticality of making the emitter resistor zero (i.e., using the open-loop output Z of the opamp). Also note the similarity to the Blackmer VCA and its progeny.

 

[JohnRoberts]

[quote author="Samuel Groner"]
I wonder how they go about that in precision instrumentation amplifier ICs where we have low collector current but can't afford large capacitors to implement that RC network?

I would prefer both C6 and 1 nF be connected to AGND.

Can you elaborate on the advantages of grounding C6? The way I've drawn it allows C6 to have low rated voltage and hence size. On breadboard, I connected the RC network to VEE, not AGND.

Samuel[/quote]

The current density of the input stage in that topology is the product of both the collector R and nominal voltage across it, as established by r16/17 divider. Since you may run into issues wrt opamp input CM range I see no big problem with your added parallel RC for different DC and AC Resistance at that node.

Normally you would want the + and - inputs referenced to the same AC ground, typically VEE for this topology, but in this specific case if instead of placing the 2K in parallel it is placed in series with the 56K with the 1nF decoupling cap connected from the junction to ground both inputs could be referenced to signal ground. In theory any such VEE noise that gets into the output due to differences between + and - paths should be similar in both and cancel in a following differential stage but I lean towards just referencing to a presumably cleaner AC ground in the first place.

Note: There may be a specific class of opamp with poor -PSRR that would benefit from referencing the inputs to - supply but that is getting too esoteric for even me to pursue.

JR

PS: Yes Brad very similar to log transistor connection. FWIW it's pretty common in those applications to use a resistor in series between emitter and opamp output to put a finite limit on feedback path voltage gain, and then use an overall shunt cap from output to - input to insure HF stability.

 

[Samuel Groner]

Thinking over it it seems to me that the additional RC network is actually a good thing to have from another point of view: it boosts the o/l gain within the audio range (if the capacitor is chosen small enough), providing some sort of two-pole compensation and decreased distortion, right?

Samuel

 

[JohnRoberts]

[quote author="Samuel Groner"]Thinking over it it seems to me that the additional RC network is actually a good thing to have from another point of view: it boosts the o/l gain within the audio range (if the capacitor is chosen small enough), providing some sort of two-pole compensation and decreased distortion, right?

Samuel[/quote]

Yes. I have even seen people leave a few dB of gain there with unity gain stable opamps but my sense is that this topology doesn't really suffer from inadequate OL gain. In addition to any loop gain from that resistor ratio, there is additional OL gain from the collector R divided by the gain resistor between input transistor emitters. So in effect total open loop gain tracks and increases as closed loop gain is increased, thus the good performance of this general topology at high gain.

I would use a value that is several times larger than needed to insure stability on the bench just to be safe.

JR

 

[edanderson]

[quote author="mediatechnology"]

In order to properly balance the distributed capacitances of the secondary

OK, that makes sense. They design it as if the distributed capacitances are lumped together at the grounded end of the secondary. And it seems from what he said that the transformer "likes" a particular end grounded.

In his answer he mentioned that some Lundahls he thought prefered balanced connection.

EDIT: Do you suppose that the "start" winding, closest to the core with the highest capacitance to it, is the grounded end? Good question for either CJ or larrchild.[/quote]

the main reason a transformer "likes" to have a particular end grounded has to do with the interleaving of primary and secondary windings on the bobbin. basically if you put a "hot" end of a winding physically next to another "hot" end there is more capacitive coupling. so the layers are arranged so that the cold ends surround the hot ends. lundahl has some notes on their site about this.

the jensens, and indeed most audio transformers whether they say it or not, are designed to have one end of one winding grounded. lundahls can be different because they are built on a dual bobbin, which gives the opportunity to have two symmetrical sections, which can be used in a differential fashion. in their datasheets, lundahl specify if the transformer is to be used in a differential or single ended drive, or if either is okay. other examples include the cinemag dual bobbin mic inputs and the old marinair inputs.

ed